PIC18LF6628T-I/PT Microchip Technology, PIC18LF6628T-I/PT Datasheet - Page 34
![PIC18 With 96KB Flash, 4KB RAM, 1024 DataEE, 12-bit ADC 64 TQFP 10x10x1mm T/R](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18LF6628T-I/PT
Manufacturer Part Number
PIC18LF6628T-I/PT
Description
PIC18 With 96KB Flash, 4KB RAM, 1024 DataEE, 12-bit ADC 64 TQFP 10x10x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F8627T-IPT.pdf
(44 pages)
2.PIC18F6628-IPT.pdf
(60 pages)
3.PIC18F6628-IPT.pdf
(6 pages)
Specifications of PIC18LF6628T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
96KB (48K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC18LF6628T-I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF6628T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F872X FAMILY
TABLE 5-3:
DS39643C-page 34
WRTB
WRTC
EBTR7
EBTR6
EBTR5
EBTR4
EBTR3
EBTR2
EBTR1
EBTR0
EBTRB
DEV<10:3>
DEV<2:0>
REV<4:0>
Note 1:
Bit Name
2:
The BBSIZ<1:0> bits cannot be changed once any of the following code-protect bits are enabled: CPB or CP0, WRTB
or WRT0, EBTRB or EBTR0.
Available on PIC18F8XXX devices only.
PIC18F872X FAMILY CONFIGURATION BIT DESCRIPTIONS (CONTINUED)
Configuration
CONFIG6H
CONFIG6H
CONFIG7H
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
DEVID2
DEVID1
DEVID1
Words
Write Protection bit (Boot Block memory area)
1 = Boot Block is not write-protected
0 = Boot Block is write-protected
Write Protection bit (Configuration registers)
1 = Configuration registers are not write-protected
0 = Configuration registers are write-protected
Table Read Protection bit (Block 7 code memory area)
1 = Block 7 is not protected from table reads executed in other blocks
0 = Block 7 is protected from table reads executed in other blocks
Table Read Protection bit (Block 6 code memory area)
1 = Block 6 is not protected from table reads executed in other blocks
0 = Block 6 is protected from table reads executed in other blocks
Table Read Protection bit (Block 5 code memory area)
1 = Block 5 is not protected from table reads executed in other blocks
0 = Block 5 is protected from table reads executed in other blocks
Table Read Protection bit (Block 4 code memory area)
1 = Block 4 is not protected from table reads executed in other blocks
0 = Block 4 is protected from table reads executed in other blocks
Table Read Protection bit (Block 3 code memory area)
1 = Block 3 is not protected from table reads executed in other blocks
0 = Block 3 is protected from table reads executed in other blocks
Table Read Protection bit (Block 2 code memory area)
1 = Block 2 is not protected from table reads executed in other blocks
0 = Block 2 is protected from table reads executed in other blocks
Table Read Protection bit (Block 1 code memory area)
1 = Block 1 is not protected from table reads executed in other blocks
0 = Block 1 is protected from table reads executed in other blocks
Table Read Protection bit (Block 0 code memory area)
1 = Block 0 is not protected from table reads executed in other blocks
0 = Block 0 is protected from table reads executed in other blocks
Table Read Protection bit (Boot Block memory area)
1 = Boot Block is not protected from table reads executed in other blocks
0 = Boot Block is protected from table reads executed in other blocks
Device ID bits
These bits are used with the DEV<2:0> bits in the DEVID1 register to identify the
part number.
Device ID bits
These bits are used with the DEV<10:3> bits in the DEVID2 register to identify the
part number.
Revision ID bits
These bits are used to indicate the revision of the device.
Description
© 2009 Microchip Technology Inc.