PIC24F04KA201T-I/SO Microchip Technology, PIC24F04KA201T-I/SO Datasheet - Page 29
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PIC24F04KA201T-I/SO
Manufacturer Part Number
PIC24F04KA201T-I/SO
Description
PIC24F Core, 4KB Flash, 512B RAM, 3V, Deep Sleep, 10-bit 500ksps ADC, CTMU, UART
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24F04KA201-ISS.pdf
(8 pages)
2.PIC24F04KA201-ISS.pdf
(48 pages)
3.PIC24F04KA201-ISS.pdf
(224 pages)
4.PIC24F04KA201-ISS.pdf
(26 pages)
Specifications of PIC24F04KA201T-I/SO
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
4KB (1.375K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
TABLE 4-2:
© 2008 Microchip Technology Inc.
DSWDTPS<3:0>
DSZPBOR
FCKSM<1:0>
FNOSC<2:0>
FWDTEN
GSS0
GWRP
ICS<1:0>
Note 1:
Bit Field
2:
Applies only to the 28-pin device.
The MCLRE fuse can only be changed when using the V
from accidentally locking out the device from low-voltage test entry.
PIC24FXXKAXXX FAMILY CONFIGURATION BITS DESCRIPTION (CONTINUED)
FDS<3:0>
FDS<6>
FOSC<7:6>
FOSCSEL<2:0> Oscillator Selection bits
FWDT<7>
FGS<1>
FGS<0>
FICD<1:0>
Register
Deep Sleep Watchdog Timer Postscale Select bits
The DSWDT prescaler is 32; this creates an approximate base time unit of
1 ms.
1111 = 1:2,147,483,648 (25.7 days)
1110 = 1:536,870,912 (6.4 days)
1101 = 1:134,217,728 (38.5 hours)
1100 = 1:33,554,432 (9.6 hours)
1011 = 1:8,388,608 (2.4 hours)
1010 = 1:2,097,152 (36 minutes)
1001 = 1:524,288 (9 minutes)
1000 = 1:131,072 (135 seconds)
0111 = 1:32,768 (34 seconds)
0110 = 1:8,192 (8.5 seconds)
0101 = 1:2,048 (2.1 seconds)
0100 = 1:512 (528 ms)
0011 = 1:128 (132 ms)
0010 = 1:32 (33 ms)
0001 = 1:8 (8.3 ms)
0000 = 1:2 (2.1 ms)
Deep Sleep Zero-Power BOR Enable bit
1 = Zero-Power BOR enabled in Deep Sleep
0 = Zero-Power BOR disabled in Deep Sleep (does not affect operation in non
Clock Switching and Monitor Selection Configuration bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
000 = Fast RC Oscillator (FRC)
001 = Fast RC Oscillator with divide-by-N with PLL module (FRCDIV+PLL)
010 = Primary Oscillator (XT, HS, EC)
011 = Primary Oscillator with PLL module (HS+PLL, EC+PLL)
100 = Secondary Oscillator (SOSC)
101 = Low-Power RC Oscillator (LPRC)
110 = Reserved; do not use
111 = Fast RC Oscillator with divide-by-N (FRCDIV)
Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled (control is placed on the SWDTEN bit)
General Segment Code Flash Code Protection bit
1 = No protection
0 = Standard security enabled
General Segment Code Flash Write Protection bit
1 = General segment may be written
0 = General segment is write-protected
ICD Pin Placement Select bit
11 = ICD EMUC/EMUD pins are shared with PGEC1/PGED1
10 = ICD EMUC/EMUD pins are shared with PGEC2/PGED2
01 = ICD EMUC/EMUD pins are shared with PGEC3/PGED3
00 = Reserved; do not use
Deep Sleep modes)
Advance Information
PP
-Based Test mode entry. This prevents a user
Description
PIC24FXXKAXXX
DS39919A-page 29