PIC24F04KA201T-I/SS Microchip Technology, PIC24F04KA201T-I/SS Datasheet - Page 169
PIC24F04KA201T-I/SS
Manufacturer Part Number
PIC24F04KA201T-I/SS
Description
PIC24F Core, 4KB Flash, 512B RAM, 3V, Deep Sleep, 10-bit 500ksps ADC, CTMU, UART
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24F04KA201-ISS.pdf
(8 pages)
2.PIC24F04KA201-ISS.pdf
(48 pages)
3.PIC24F04KA201-ISS.pdf
(224 pages)
4.PIC24F04KA201-ISS.pdf
(26 pages)
Specifications of PIC24F04KA201T-I/SS
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
4KB (1.375K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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REGISTER 23-5:
REGISTER 23-6:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1-0
MCLRE
R/P-1
U-0
—
2:
(1)
The MCLRE fuse can only be changed when using the V
user from accidentally locking out the device from the low-voltage test entry.
Refer to the electrical specifications for BOR voltages.
MCLRE: MCLR Pin Enable bit
1 = MCLR pin enabled; RA5 input pin disabled
0 = RA5 input pin enabled; MCLR disabled
BORV<1:0>: Brown-out Reset Enable bits
11 = Brown-out Reset set to lowest voltage
10 = Brown-out Reset
01 = Brown-out Reset set to highest voltage
00 = Low-power Brown-out Reset occurs around 2.0V
Unimplemented: Read as ‘0’
PWRTEN: Power-up Timer Enable bit
0 = PWRT disabled
1 = PWRT enabled
Unimplemented: Read as ‘0’
BOREN<1:0>: Brown-out Reset Enable bits
11 = Brown-out Reset enabled in hardware; SBOREN bit disabled
10 = Brown-out Reset enabled only while device is active and disabled in Sleep; SBOREN bit disabled
01 = Brown-out Reset controlled with the SBOREN bit setting
00 = Brown-out Reset disabled in hardware; SBOREN bit disabled
Unimplemented: Read as ‘0’
FICD<1:0:> ICD Pin Select bits
10 = PGC2/PGD2 are used for programming the device
01 = PGC3/PGD3 are used for programming the device
00, 11 = Reserved; do not use
BORV1
R/P-1
U-0
—
FPOR: RESET CONFIGURATION REGISTER
FICD: IN-CIRCUIT DEBUGGER CONFIGURATION REGISTER
(2)
P = Programmable bit
‘1’ = Bit is set
P = Programmable bit
‘1’ = Bit is set
BORV0
R/P-1
U-0
—
(2)
(1)
U-0
U-0
—
—
Preliminary
PIC24F04KA201 FAMILY
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PWRTEN
R/P-1
U-0
—
PP
-Based ICSP™ mode entry. This prevents a
U-0
U-0
—
—
x = Bit is unknown
x = Bit is unknown
BOREN1
FICD1
R/P-1
R/P-1
DS39937B-page 167
BOREN0
FICD0
R/P-1
R/P-1
bit 0
bit 0
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