PIC24F16KA301-E/SS Microchip Technology, PIC24F16KA301-E/SS Datasheet - Page 70

• Manufacturer Part Number: PIC24F16KA301-E/SS
• Description: 16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, XLP 20 SSOP .209in
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24F16KA301-E/SS

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 16KB (5.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP (0.209", 5.30mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FV32KA304 FAMILY
6.4.1
The data EEPROM can be fully erased, or can be
partially erased, at three different sizes: one word, four
words or eight words. The bits, NVMOP<1:0>
(NVMCON<1:0>), decide the number of words to be
erased. To erase partially from the data EEPROM, the
following sequence must be followed:
1.
2.
3.
4.
5.
6.
EXAMPLE 6-2:
DS39995B-page 70
int __attribute__ ((space(eedata))) eeData = 0x1234; // Global variable located in EEPROM
Configure NVMCON to erase the required
number of words: one, four or eight.
Load TBLPAG and WREG with the EEPROM
address to be erased.
Clear NVMIF status bit and enable the NVM
interrupt (optional).
Write the key sequence to NVMKEY.
Set the WR bit to begin erase cycle.
Either poll the WR bit or wait for the NVM
interrupt (NVMIF set).
unsigned int offset;
// Set up NVMCON to erase one word of data EEPROM
NVMCON = 0x4058;
// Set up a pointer to the EEPROM location to be erased
TBLPAG = __builtin_tblpage(&eeData);
offset = __builtin_tbloffset(&eeData);
__builtin_tblwtl(offset, 0);
asm volatile ("disi #5");
__builtin_write_NVM();
while(NVMCONbits.WR=1);
ERASE DATA EEPROM
SINGLE-WORD ERASE
// Initialize EE Data page pointer
// Initizlize lower word of address
// Write EEPROM data to write latch
// Disable Interrupts For 5 Instructions
// Issue Unlock Sequence & Start Write Cycle
// Optional: Poll WR bit to wait for
// write sequence to complete
A typical erase sequence is provided in
This example shows how to do a one-word erase.
Similarly, a four-word erase and an eight-word erase
can be done. This example uses C library procedures to
manage the Table Pointer (builtin_tblpage and
builtin_tbloffset) and the Erase Page Pointer
(builtin_tblwtl). The memory unlock sequence
(builtin_write_NVM) also sets the WR bit to initiate
the operation and returns control when complete.
 2011 Microchip Technology Inc.
Example
6-2.