PIC24FJ32GA104T-I/ML Microchip Technology, PIC24FJ32GA104T-I/ML Datasheet - Page 89
PIC24FJ32GA104T-I/ML
Manufacturer Part Number
PIC24FJ32GA104T-I/ML
Description
16-bit, 16 MIPS, 32KB Flash, 8KB RAM, Nanowatt XLP 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24FJ32GA102-ISP.pdf
(308 pages)
2.PIC24FJ32GA102-ISP.pdf
(12 pages)
3.PIC24FJ32GA102-ISP.pdf
(48 pages)
Specifications of PIC24FJ32GA104T-I/ML
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC24FJ32GA102-ISP PDF datasheet
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REGISTER 7-22:
2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
bit 7
bit 6-4
bit 3
bit 2-0
U-0
U-0
—
—
Unimplemented: Read as ‘0’
U2TXIP<2:0>: UART2 Transmitter Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
U2RXIP<2:0>: UART2 Receiver Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
INT2IP<2:0>: External Interrupt 2 Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
T5IP<2:0>: Timer5 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
U2TXIP2
INT2IP2
R/W-1
R/W-1
IPC7: INTERRUPT PRIORITY CONTROL REGISTER 7
W = Writable bit
‘1’ = Bit is set
U2TXIP1
INT2IP1
R/W-0
R/W-0
U2TXIP0
INT2IP0
R/W-0
R/W-0
PIC24FJ64GA104 FAMILY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
U2RXIP2
R/W-1
R/W-1
T5IP2
x = Bit is unknown
U2RXIP1
R/W-0
R/W-0
T5IP1
DS39951C-page 89
U2RXIP0
R/W-0
R/W-0
T5IP0
bit 8
bit 0
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