PIC24FJ48GA004-E/ML Microchip Technology, PIC24FJ48GA004-E/ML Datasheet - Page 36
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PIC24FJ48GA004-E/ML
Manufacturer Part Number
PIC24FJ48GA004-E/ML
Description
16-bit Family, 16 MIPS, 48KB Flash, 8192 Bytes RAM, 35 I/O, NanoWatt 44 QFN 8x8x
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
Specifications of PIC24FJ48GA004-E/ML
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DV164033, MA240013, AC164127, DM240002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ48GA004-E/ML
Manufacturer:
Microchip Technology
Quantity:
135
PIC24FJXXXGA0XX
TABLE 5-1:
5.2.4
All commands supported by the programming executive
are described in Section 5.2.5 “SCHECK Command”
through Section 5.2.12 “QVER Command”.
5.2.5
DS39768D-page 36
Legend: TBD = To Be Determined
Note 1:
15
Opcode
Length
Opcode Mnemonic
Dh
Ah
Bh
0h
1h
2h
3h
4h
5h
7h
8h
9h
Opcode
Field
SCHECK
READC
READP
RESERVED
PROGC
PROGP
RESERVED
RESERVED
RESERVED
QBLANK
QVER
PROGW
12 11
One row of code memory consists of (64) 24-bit words. Refer to Table 2-3 for device-specific information.
COMMAND DESCRIPTIONS
SCHECK COMMAND
PROGRAMMING EXECUTIVE COMMAND SET
0h
1h
(16-bit words)
Length
N/A
N/A
N/A
N/A
Description
99
1
3
4
4
3
1
4
Length
Time-out
1 ms/row
1 ms
1 ms
5 ms
5 ms
1 ms
5 ms
TBD
N/A
N/A
N/A
N/A
0
Sanity check.
Read an 8-bit word from the specified Device ID register.
Read N 24-bit instruction words of code memory starting from
the specified address.
Write an 8-bit word to the specified Device ID registers.
Program one row of code memory at the specified address,
then verify.
Query the programming executive software version.
Program one instruction word of code memory at the specified
address, then verify.
This command is reserved. It will return a NACK.
This command is reserved. It will return a NACK.
This command is reserved. It will return a NACK.
This command is reserved. It will return a NACK.
Query if the code memory is blank.
The SCHECK command instructs the programming
executive to do nothing but generate a response. This
command is used as a “Sanity Check” to verify that the
programming executive is operational.
Expected Response (2 words):
(1)
Note:
1000h
0002h
This instruction is not required for
programming
development purposes only.
Description
© 2008 Microchip Technology Inc.
but
is
provided
for