PIC24FJ64GA002T-I/SO Microchip Technology, PIC24FJ64GA002T-I/SO Datasheet - Page 10

• Manufacturer Part Number: PIC24FJ64GA002T-I/SO
• Description: 64KB, Flash, 8192bytes-RAM, 16MIPS, 21I/O, 16-bit Family,nanoWatt 28 SOIC .300in
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ64GA002T-I/SO

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 64KB (22K x 24)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164339 - MODULE SKT FOR PM3 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC24FJ64GA002T-I/SOTR

PIC24FJXXXGA0XX
2.4
The program memory map extends from 000000h to
FFFFFEh. Code storage is located at the base of the
memory map and supports up to 44K instruction words
(about 128 Kbytes). Table 2-3 shows the program
memory size and number of erase and program blocks
present in each device variant. Each erase block, or
page, contains 512 instructions, and each program
block, or row, contains 64 instructions.
Locations 800000h through 8007FEh are reserved for
executive code memory. This region stores the
programming executive and the debugging executive.
The programming executive is used for device pro-
gramming and the debugging executive is used for
in-circuit debugging. This region of memory can not be
used to store user code.
The last two implemented program memory locations
are reserved for the device Configuration registers.
TABLE 2-2:
DS39768D-page 10
PIC24FJ16GA
PIC24FJ32GA
PIC24FJ48GA
PIC24FJ64GA
PIC24FJ96GA
PIC24FJ128GAGA
Device
Memory Map
FLASH CONFIGURATION
WORD LOCATIONS FOR
PIC24FJXXXGA0XX DEVICES
00ABFEh
002BFEh
00FFFEh
0057FEh
0083FEh
0157FEh
Configuration Word
1
Addresses
00ABFCh
002BFCh
00FFFCh
0057FCh
0083FCh
0157FCh
2
Locations, FF0000h and FF0002h, are reserved for the
Device ID registers. These bits can be used by the
programmer to identify what device type is being
programmed. They are described in Section 6.1
“Device ID”. The Device ID registers read out
normally, even after code protection is applied.
Figure 2-4
PIC24FJXXXGA0XX family variants.
TABLE 2-3:
PIC24FJ16GA
PIC24FJ32GA
PIC24FJ48GA
PIC24FJ64GA
PIC24FJ96GA
PIC24FJ128GA
Device
shows
(Instruction Words)
CODE MEMORY SIZE
0083FEh (16.5K)
002BFEh (5.5K)
00ABFEh (22K)
00FFFEh (32K)
0057FEh (11K)
0157FEh (44K)
Address Limit
User Memory
the
© 2008 Microchip Technology Inc.
memory
Blocks
map
Write
176
264
344
512
688
88
for
Blocks
Erase
11
22
33
43
64
86
the