PIC24FJ64GA108T-I/PT Microchip Technology, PIC24FJ64GA108T-I/PT Datasheet - Page 249
![16-bit, 16 MIPS, 64KB Flash, 16Kb RAM, 84 I/O, NanoWatt 80 TQFP 12x12x1mm T/R](/photos/16/13/161322/tqfp64_sml.jpg)
PIC24FJ64GA108T-I/PT
Manufacturer Part Number
PIC24FJ64GA108T-I/PT
Description
16-bit, 16 MIPS, 64KB Flash, 16Kb RAM, 84 I/O, NanoWatt 80 TQFP 12x12x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheet
1.PIC24FJ128GA106-IPT.pdf
(330 pages)
Specifications of PIC24FJ64GA108T-I/PT
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC24FJ256GA110
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
8 MHz
Number Of Timers
5
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ64GA108T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 249 of 330
- Download datasheet (3Mb)
REGISTER 25-2:
REGISTER 25-3:
2010 Microchip Technology Inc.
bit 1-0
Note 1:
bit 23
bit 15
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 23-16
bit 15
bit 14
bit 13
bit 12-8
bit 7-0
WPEND
WPFP7
R/PO-1
R/PO-1
R/PO-1
—
Implemented in 100-pin devices only; otherwise unimplemented, read as ‘1’.
POSCMD<1:0>: Primary Oscillator Configuration bits
11 = Primary Oscillator disabled
10 = HS Oscillator mode selected
01 = XT Oscillator mode selected
00 = EC Oscillator mode selected
Reserved
WPEND: Segment Write Protection End Page Select bit
1 = Protected code segment upper boundary is at the last page of program memory; lower boundary
0 = Protected code segment lower boundary is at the bottom of program memory (000000h); upper
WPCFG: Configuration Word Code Page Protection Select bit
1 = Last page (at the top of program memory) and Flash Configuration Words are not protected if
0 = Last page and Flash Configuration Words are code-protected if WPEND = 0
WPDIS: Segment Write Protection Disable bit
1 = Segmented code protection disabled
0 = Segmented code protection enabled; protected segment defined by WPEND, WPCFG and
Reserved
WPFP<7:0>: Protected Code Segment Boundary Page bits
Designates the 512-word program code page that is the boundary of the protected code segment,
starting with Page 0 at the bottom of program memory.
If WPEND = 1:
First address of designated code page is the lower boundary of the segment.
If WPEND = 0:
Last address of designated code page is the upper boundary of the segment.
WPCFG
WPFP6
R/PO-1
R/PO-1
R/PO-1
is the code page specified by WPFP<7:0>
boundary is the code page specified by WPFP<7:0>
WPEND = 0
WPFPx Configuration bits
—
CW2: FLASH CONFIGURATION WORD 2 (CONTINUED)
CW3: FLASH CONFIGURATION WORD 3
PO = Program Once bit
WPFP5
R/PO-1
R/PO-1
R/PO-1
WPDIS
—
PIC24FJ256GA110 FAMILY
WPFP4
R/PO-1
R/PO-1
R/PO-1
—
—
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
R/PO-1
R/PO-1
R/PO-1
WPFP3
—
—
WPFP2
R/PO-1
R/PO-1
R/PO-1
—
—
‘0’ = Bit is cleared
WPFP1
R/PO-1
R/PO-1
R/PO-1
—
—
DS39905E-page 249
WPFP0
R/PO-1
R/PO-1
R/PO-1
—
—
bit 16
bit 8
bit 0
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