PIC24FJ64GA110-I/PT Microchip Technology, PIC24FJ64GA110-I/PT Datasheet - Page 117
![16-bit, 16 MIPS, 64KB Flash, 16Kb RAM, 84 I/O, NanoWatt 100 TQFP 12x12x1mm TRAY](/photos/16/13/161322/tqfp64_sml.jpg)
PIC24FJ64GA110-I/PT
Manufacturer Part Number
PIC24FJ64GA110-I/PT
Description
16-bit, 16 MIPS, 64KB Flash, 16Kb RAM, 84 I/O, NanoWatt 100 TQFP 12x12x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheet
1.PIC24FJ128GA106-IPT.pdf
(330 pages)
Specifications of PIC24FJ64GA110-I/PT
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Processor Series
PIC24FJ256GA110
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
8 MHz
Number Of Timers
5
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ64GA110-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 117 of 330
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8.3
The operation of the oscillator is controlled by three
Special Function Registers (SFRs):
• OSCCON
• CLKDIV
• OSCTUN
The OSCCON register
trol register for the oscillator. It controls clock source
switching and allows the monitoring of clock sources.
REGISTER 8-1:
2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
Note 1:
CLKLOCK
R/SO-0
U-0
—
2:
3:
Control Registers
Reset values for these bits are determined by the FNOSC Configuration bits.
The state of the IOLOCK bit can only be changed once an unlocking sequence has been executed. In
addition, if the IOL1WAY Configuration bit is ‘1’ once the IOLOCK bit is set, it cannot be cleared.
Also, resets to ‘0’ during any valid clock switch or whenever a non-PLL Clock mode is selected.
Unimplemented: Read as ‘0’
COSC<2:0>: Current Oscillator Selection bits
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with Postscaler and PLL module (FRCPLL)
000 = Fast RC Oscillator (FRC)
Unimplemented: Read as ‘0’
NOSC<2:0>: New Oscillator Selection bits
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with Postscaler and PLL module (FRCPLL)
000 = Fast RC Oscillator (FRC)
IOLOCK
COSC2
R/W-0
R-0
OSCCON: OSCILLATOR CONTROL REGISTER
(Register
(2)
CO = Clearable Only bit
W = Writable bit
‘1’ = Bit is set
COSC1
8-1) is the main con-
LOCK
R-0
R-0
(3)
PIC24FJ256GA110 FAMILY
COSC0
R-0
U-0
—
(1)
SO = Settable Only bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/CO-0
The CLKDIV register
features associated with Doze mode, as well as the
postscaler for the FRC Oscillator.
The OSCTUN register
fine tune the FRC Oscillator over a range of approxi-
mately ±12%.
U-0
CF
—
POSCEN
R/W-x
NOSC2
R/W-0
(1)
(Register
(Register
x = Bit is unknown
SOSCEN
R/W-x
NOSC1
R/W-0
8-3) allows the user to
(1)
8-2) controls the
DS39905E-page 117
R/W-x
OSWEN
NOSC0
R/W-0
(1)
bit 8
bit 0
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