PIC24FJ64GB002-I/SS Microchip Technology, PIC24FJ64GB002-I/SS Datasheet - Page 276

• Manufacturer Part Number: PIC24FJ64GB002-I/SS
• Description: 16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP, USB OTG 28 SSOP .209in TUBE
• Manufacturer: Microchip Technology

Specifications of PIC24FJ64GB002-I/SS

• Processor Series: PIC24
• Core: PIC24F
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 8192 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-28
• Development Tools By Supplier: MPLAB Integrated Development Environment
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current (max): 300 mA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

modules are related in this application. This example also
discussion on measuring capacitance and time with the
Reference Manual”.
PIC24FJ64GB004 FAMILY
25.2
Time measurements on the pulse width can be similarly
performed using the A/D module’s internal capacitor
(C
Figure 25-2 shows the external connections used for
time measurements, and how the CTMU and A/D
shows both edge events coming from the external
CTEDG pins, but other configurations using internal
edge sources are possible. For the smallest time
measurements, select the internal A/D Channel 31,
CH0S<4:0> = 11111. This minimizes any stray
capacitance that may otherwise be associated with
using an input pin, thus keeping the total capacitance
to that of the A/D Converter itself (4-5 pF). A detailed
CTMU module is provided in the “PIC24F Family
FIGURE 25-2:
FIGURE 25-3:
DS39940D-page 276
AD
) and a precision resistor for current calibration.
Measuring Time
TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR TIME
MEASUREMENT
TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR PULSE
DELAY GENERATION
CTEDG1
C2INB
C
DELAY
CTEDG1
CTEDG2
ANx
R
PR
EDG1
CV
Current Source
PIC24F Device
Comparator
REF
CTMU
C2
EDG2
EDG1
C
programmable delay from an edge event input to the module.
25.3
The CTMU module can also generate an output pulse with
edges that are not synchronous with the device’s system
clock. More specifically, it can generate a pulse with a
When the module is configured for pulse generation
delay by setting the TGEN bit (CTMUCON<12>), the
internal current source is connected to the B input of
Comparator 2. A capacitor (C
the Comparator 2 pin, C2INB, and the comparator volt-
age reference, CV
is then configured for a specific trip point. The module
begins to charge C
detected. When C
point, a pulse is output on CTPLS. The length of the
pulse delay is determined by the value of C
the CV
Figure 25-3 shows the external connections for pulse
generation, as well as the relationship of the different ana-
log modules required. While CTEDG1 is shown as the
input pulse source, other options are available. A detailed
discussion on pulse generation with the CTMU module is
provided in the “PIC24F Family Reference Manual”.
AD
PIC24F Device
A/D Converter
Current Source
CTMU
REF
Output Pulse
Pulse Generation and Delay
trip point.
DELAY
REF
DELAY
, is connected to C2INA. CV
CTPLS
 2010 Microchip Technology Inc.
charges above the CV
when an edge event is
DELAY
) is connected to
DELAY
REF
and
REF
trip