PIC24FV32KA304-E/ML Microchip Technology, PIC24FV32KA304-E/ML Datasheet - Page 316
![32KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 44 QFN 8x8x0.9mm](/photos/16/12/161286/qfn44_sml.jpg)
PIC24FV32KA304-E/ML
Manufacturer Part Number
PIC24FV32KA304-E/ML
Description
32KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 44 QFN 8x8x0.9mm
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet
1.PIC24F16KA301T-ISO.pdf
(320 pages)
Specifications of PIC24FV32KA304-E/ML
Processor Series
PIC24FV
Core
PIC
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
2 KB
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
QFN-44
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
38
Eeprom Size
512 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FV32KA304-E/ML
Manufacturer:
MICROCHIP
Quantity:
12 000
PIC24FV32KA304 FAMILY
DS39995B-page 316
I2CxSTAT (I2Cx Status) .......................................... 178
I2CxxCON (I2Cx Control) ........................................ 176
ICxCON1 (Input Capture x Control 1) ...................... 153
ICxCON2 (Input Capture x Control 2) ...................... 154
IEC0 (Interrupt Enable Control 0) .............................. 93
IEC1 (Interrupt Enable Control 1) .............................. 94
IEC2 (Interrupt Enable Control 2) .............................. 95
IEC3 (Interrupt Enable Control 3) .............................. 96
IEC4 (Interrupt Enable Control 4) .............................. 97
IEC5 (Interrupt Enable Control 5) .............................. 98
IFS0 (Interrupt Flag Status 0) .................................... 87
IFS1 (Interrupt Flag Status 1) .................................... 88
IFS2 (Interrupt Flag Status 2) .................................... 89
IFS3 (Interrupt Flag Status 3) .................................... 90
IFS4 (Interrupt Flag Status 4) .................................... 91
IFS5 (Interrupt Flag Status 5) .................................... 92
INTCON1 (Interrupt Control 1) ................................... 85
INTTREG (Interrupt Control and Status) .................. 114
IPC0 (Interrupt Priority Control 0) .............................. 99
IPC1 (Interrupt Priority Control 1) ............................ 100
IPC12 (Interrupt Priority Control 12) ........................ 109
IPC120 (Interrupt Priority Control 20) ...................... 113
IPC15 (Interrupt Priority Control 15) ........................ 110
IPC16 (Interrupt Priority Control 16) ........................ 111
IPC18 (Interrupt Priority Control 18) ........................ 112
IPC2 (Interrupt Priority Control 2) ............................ 101
IPC3 (Interrupt Priority Control 3) ............................ 102
IPC4 (Interrupt Priority Control 4) ............................ 103
IPC5 (Interrupt Priority Control 5) ............................ 104
IPC6 (Interrupt Priority Control 6) ............................ 105
IPC7 (Interrupt Priority Control 7) ............................ 106
IPC8 (Interrupt Priority Control 8) ............................ 107
IPC9 (Interrupt Priority Control 9) ............................ 108
MINSEC (RTCC Minutes and Seconds Value) ........ 196
MTHDY (RTCC Month and Day Value) ................... 195
NVMCON (Flash Memory Control) ............................ 61
NVMCON (Nonvolatile Memory Control) ................... 68
OCxCON1 (Output Compare x Control 1) ............... 161
OCxCON2 (Output Compare x Control 2) ............... 163
OSCCON (Oscillator Control) .................................. 119
OSCTUN (FRC Oscillator Tune) .............................. 122
PADCFG1 (Pad Configuration Control) ................... 180
RCFGCAL (RTCC Calibration and
RCON (Reset Control) ............................................... 74
REFOCON (Reference Oscillator Control) ............... 125
RTCCSWT (Control/Sample Window Timer) ........... 199
RTCPWC (RTCC Configuration 2) .......................... 193
SPIxCON1 (SPIx Control 1) ..................................... 170
SPIxCON2 (SPIx Control 2) ..................................... 171
SPIxSTAT (SPIx Status and Control) ...................... 168
SR (ALU STATUS) .............................................. 34, 83
T1CON (Timer1 Control) .......................................... 144
TxCON (Timer2/4 Control) ....................................... 148
TyCON (Timer3/5 Control) ....................................... 149
ULPWCON (ULPWU Control) .................................. 134
UxMODE (UARTx Mode) ......................................... 184
UxRXREG (UARTx Receive) ................................... 188
UxSTA (UARTx Status and Control) ........................ 186
UxTXREG (UARTx Transmit) .................................. 188
WKDYHR (RTCC Weekday and Hours Value) ........ 196
YEAR (RTCC Year Value) ....................................... 195
Configuration) .................................................. 191
Resets
Revision History ............................................................... 311
RTCC ............................................................................... 189
S
Serial Peripheral Interface. See SPI.
SFR Space ........................................................................ 40
Software Simulator (MPLAB SIM) ................................... 253
Software Stack ................................................................... 53
T
Timer1 .............................................................................. 143
Timer2/3 ........................................................................... 145
Timer2/3 and Timer4/5 .................................................... 145
Timing Diagrams
Timing Requirements
U
UART ............................................................................... 181
W
Watchdog Timer
Watchdog Timer (WDT) ................................................... 248
WWW Address ................................................................ 317
WWW, On-Line Support .................................................... 11
Brown-out Reset (BOR) ............................................. 77
Clock Source Selection .............................................. 75
Deep Sleep BOR (DSBOR) ....................................... 77
Delay Times ............................................................... 76
Device Times ............................................................. 76
RCON Flag Operation ............................................... 75
SFR States ................................................................ 77
Alarm Configuration ................................................. 200
Alarm Mask Settings (figure) ................................... 201
Calibration ............................................................... 200
Module Registers ..................................................... 190
Source Clock ........................................................... 189
CLKO and I/O Timing .............................................. 283
External Clock .......................................................... 281
CLKO and I/O .......................................................... 283
External Clock .......................................................... 281
PLL Clock Specifications ......................................... 282
Baud Rate Generator (BRG) ................................... 182
Break and Sync Transmit Sequence ....................... 183
IrDA Support ............................................................ 183
Operation of UxCTS and UxRTS Control Pins ........ 183
Receiving in 8-Bit or 9-Bit Data Mode ...................... 183
Transmitting in 8-Bit Data Mode .............................. 183
Transmitting in 9-Bit Data Mode .............................. 183
Deep Sleep (DSWDT) ............................................. 250
Windowed Operation ............................................... 249
Mapping ........................................................... 190
Write Lock ........................................................ 190
Clock Source Selection ........................... 190
2011 Microchip Technology Inc.