PIC24HJ128GP502T-I/MM Microchip Technology, PIC24HJ128GP502T-I/MM Datasheet - Page 191
PIC24HJ128GP502T-I/MM
Manufacturer Part Number
PIC24HJ128GP502T-I/MM
Description
16-bit MCU, 128KB Flash,CAN,DMA,40 MIPS,nanoWatt 28 QFN-S 6x6mm T/R
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP302-ISO.pdf
(368 pages)
3.PIC24HJ32GP302-ISO.pdf
(8 pages)
4.PIC24HJ32GP302-ISO.pdf
(12 pages)
Specifications of PIC24HJ128GP502T-I/MM
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
128KB (43K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC24HJ128GP502T-I/MMTR
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ32GP302-ISO PDF datasheet #2
- PIC24HJ32GP302-ISO PDF datasheet #3
- PIC24HJ32GP302-ISO PDF datasheet #4
- Current page: 191 of 368
- Download datasheet (5Mb)
REGISTER 18-2:
© 2011 Microchip Technology Inc.
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
Refer to Section 17. “UART” (DS70232) in the “dsPIC33F/PIC24H Family Reference Manual” for
information on enabling the UART module for transmit operation.
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
ADDEN: Address Character Detect bit (bit 8 of received data = 1)
1 = Address Detect mode enabled. If 9-bit mode is not selected, this does not take effect
0 = Address Detect mode disabled
RIDLE: Receiver Idle bit (read-only)
1 = Receiver is Idle
0 = Receiver is active
PERR: Parity Error Status bit (read-only)
1 = Parity error has been detected for the current character (character at the top of the receive FIFO)
0 = Parity error has not been detected
FERR: Framing Error Status bit (read-only)
1 = Framing error has been detected for the current character (character at the top of the receive
0 = Framing error has not been detected
OERR: Receive Buffer Overrun Error Status bit (read/clear only)
1 = Receive buffer has overflowed
0 = Receive buffer has not overflowed. Clearing a previously set OERR bit (1 → 0 transition) resets
URXDA: Receive Buffer Data Available bit (read-only)
1 = Receive buffer has data, at least one more character can be read
0 = Receive buffer is empty
FIFO)
the receiver buffer and the UxRSR to the empty state
U
x
STA: UART
x
STATUS AND CONTROL REGISTER (CONTINUED)
DS70293E-page 191
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