PIC24HJ12GP202-E/SS Microchip Technology, PIC24HJ12GP202-E/SS Datasheet - Page 168
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PIC24HJ12GP202-E/SS
Manufacturer Part Number
PIC24HJ12GP202-E/SS
Description
12KB, Flash, 1024bytes-RAM, 40MIPS, 21I/O, 16-bit Family,nanoWatt 28 SSOP .209in
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(242 pages)
2.PIC24HJ12GP201-ISO.pdf
(8 pages)
3.PIC24HJ12GP201-ISO.pdf
(84 pages)
4.PIC24HJ12GP201-ISO.pdf
(12 pages)
Specifications of PIC24HJ12GP202-E/SS
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ12GP202-E/SS
Manufacturer:
MICROCHIP
Quantity:
12 000
- PIC24HJ12GP201-ISO PDF datasheet
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- PIC24HJ12GP201-ISO PDF datasheet #4
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PIC24HJ12GP201/202
19.2
All of the PIC24HJ12GP201/202 devices power their
core digital logic at a nominal 2.5V. This can create a
conflict for designs that are required to operate at a
higher typical voltage, such as 3.3V. To simplify system
design, all devices in the PIC24HJ12GP201/202 family
incorporate an on-chip regulator that allows the device
to run its core logic from V
The regulator provides power to the core from the other
V
(less than 5 ohms) capacitor (such as tantalum or
ceramic) must be connected to the V
(Figure 19-1). This helps to maintain the stability of the
regulator. The recommended value for the filter capac-
itor is provided in Table 22-13 located in Section 22.1
“DC Characteristics”.
On a POR
voltage regulator to generate an output voltage. During
this time, designated as T
disabled. T
resumes operation after any power-down.
FIGURE 19-1:
DS70282D-page 166
DD
Note:
Note 1:
pins. When the regulator is enabled, a low-ESR
2:
On-Chip Voltage Regulator
C
,
EFC
STARTUP
it takes approximately 20 μs for the on-chip
It is important for low-ESR capacitors to be
placed as close as possible to the V
V
DDCORE
These are typical operating voltages. Refer
to Table 22-13: “Internal Voltage Regulator
Specifications” located in Section 22.1 “DC
Characteristics” for the full operating
ranges of V
It is important for low-ESR capacitors to be
placed as close as possible to the V
V
3.3V
DDCORE
is applied every time the device
pin.
pin.
CONNECTIONS FOR THE
ON-CHIP VOLTAGE
REGULATOR
V
V
V
DD
DD
CAP
SS
PIC24H
DD
STARTUP
and V
/V
.
DDCORE
CAP
/V
, code execution is
DDCORE
CAP
(1,2)
/V
DDCORE
.
CAP
/
CAP
Preliminary
pin
/
19.3
The Brown-out Reset (BOR) module is based on an
internal voltage reference circuit that monitors the reg-
ulated voltage V
the BOR module is to generate a device Reset when a
brown-out condition occurs. Brown-out conditions are
generally caused by glitches on the AC mains (for
example, missing portions of the AC cycle waveform
due to bad power transmission lines, or voltage sags
due to excessive current draw when a large inductive
load is turned on).
A BOR generates a Reset pulse, which resets the
device. The BOR selects the clock source, based on
the device Configuration bit values (FNOSC<2:0> and
POSCMD<1:0>).
If an oscillator mode is selected, the BOR activates the
Oscillator Start-up Timer (OST). The system clock is
held until OST expires. If the PLL is used, the clock is
held until the LOCK bit (OSCCON<5>) is ‘1’.
Concurrently, the PWRT time-out (TPWRT) will be
applied before the internal Reset is released. If
TPWRT = 0 and a crystal oscillator is being used, a
nominal delay of TFSCM = 100 is applied. The total
delay in this case is TFSCM.
The BOR Status bit (RCON<1>) is set to indicate that a
BOR has occurred. The BOR circuit continues to oper-
ate while in Sleep or Idle modes and resets the device
should V
DD
BOR: Brown-Out Reset
fall below the BOR threshold voltage.
CAP
/V
DDCORE
© 2009 Microchip Technology Inc.
. The main purpose of
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