PIC24HJ64GP504T-I/ML Microchip Technology, PIC24HJ64GP504T-I/ML Datasheet - Page 3

• Manufacturer Part Number: PIC24HJ64GP504T-I/ML
• Description: 16-bit MCU, 64KB Flash,CAN,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP504T-I/ML

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (22K x 24)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 13x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC24HJ64GP504T-I/MLTR

TABLE 2:
© 2010 Microchip Technology Inc.
Note 1:
Comparator
Operations
Regulator
Module
Internal
Voltage
ECAN
ECAN
RTCC
UART
UART
JTAG
CPU
ADC
PSV
SPI
All
Only those issues indicated in the last column apply to the current silicon revision.
Consumption
During Reset
Sleep Mode
Sleep Mode
SILICON ISSUE SUMMARY (CONTINUED)
Generation
Output Pin
Instruction
Operation
Operation
Character
Operation
Operation
Boundary
Transmit
IR Mode
Feature
Receive
in Sleep
Current
150ºC
Break
Mode
EXCH
Scan
—
Number
Item
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
When the UART module is operating in 8-bit mode
(PDSEL = 0x) and using the IrDA
(IREN = 1), the module incorrectly transmits a data
payload of 80h as 00h.
When CMCON<CxOUTEN> is set, the Comparator out-
put pin cannot be used as a general purpose I/O pin even
if the Comparator is disabled.
When the VREGS bit (RCON<8>) is set to a logic ‘0’ the
device may reset and higher Sleep current may be
observed.
An address error trap occurs in certain addressing modes
when accessing the first four bytes of any PSV page.
The WAKIF bit in the CxINTF register cannot be cleared
by software instruction after the device is interrupted from
Sleep due to activity on the CAN bus.
The ECAN module may not store the received data in the
correct location.
The EXCH instruction does not execute correctly.
Writing to the SPIxBUF register as soon as TBF bit is
cleared will cause the SPI module to ignore written data.
The UART module will not generate back-to-back Break
characters.
If the ADC module is in an enabled state when the device
enters Sleep Mode, the power-down current (I
device may exceed the device data sheet specifications.
On 28-pin devices, JTAG Boundary Scan does not function
correctly for pin 7. Both pins 6 and 7 respond to stimulus
applied to pin 7.
The RTCC module gets reset on any device Reset,
instead of getting reset only on a POR or BOR.
These revisions of silicon only support 140ºC operation
instead of 150ºC for Hi-Temp operating temperature.
Issue Summary
®
encoder/decoder
PD
) of the
A1 A2 A3 A4
X
X
X
X
X
X
X
X
X
X
X
X
X
DS80441F-page 3
Revisions
Affected
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
(1)
X
X
X
X
X
X
X
X
X
X
X
X