PIC32MX564F064H-I/MR Microchip Technology, PIC32MX564F064H-I/MR Datasheet - Page 163

64 PINS, 64KB Flash, 32KB RAM, 80 MHz, USB, CAN, 4 DMA 64 QFN 9x9x0.9mm TUBE

PIC32MX564F064H-I/MR

Manufacturer Part Number
PIC32MX564F064H-I/MR
Description
64 PINS, 64KB Flash, 32KB RAM, 80 MHz, USB, CAN, 4 DMA 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet

Specifications of PIC32MX564F064H-I/MR

Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Processor Series
PIC32MX5x
Core
MIPS32
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
REGISTER 28-1:
© 2010 Microchip Technology Inc.
bit 19-12
bit 11-4
bit 3
bit 2
bit 1-0
PWP<7:0>: Program Flash Write-Protect bits
Prevents selected program Flash memory pages from being modified during code execution.
The PWP bits represent the one’s complement of the number of write-protected program Flash
memory pages.
11111111 = Disabled
11111110 = 0xBD00_0FFF
11111101 = 0xBD00_1FFF
11111100 = 0xBD00_2FFF
11111011 = 0xBD00_3FFF
11111010 = 0xBD00_4FFF
11111001 = 0xBD00_5FFF
11111000 = 0xBD00_6FFF
11110111 = 0xBD00_7FFF
11110110 = 0xBD00_8FFF
11110101 = 0xBD00_9FFF
11110100 = 0xBD00_AFFF
11110011 = 0xBD00_BFFF
11110010 = 0xBD00_CFFF
11110001 = 0xBD00_DFFF
11110000 = 0xBD00_EFFF
11101111 = 0xBD00_FFFF
01111111 = 0xBD07_FFFF
Reserved: Write ‘ 1 ’
ICESEL: In-Circuit Emulator/Debugger Communication Channel Select bit
1 = PGEC2/PGED2 pair is used
0 = PGEC1/PGED1 pair is used
Reserved: Write ‘ 1 ’
DEBUG<1:0>: Background Debugger Enable bits (forced to ‘ 11 ’ if code-protect is enabled)
11 = Debugger is disabled
10 = Debugger is enabled
01 = Reserved (same as ‘ 11 ’ setting)
00 = Reserved (same as ‘ 11 ’ setting)
DEVCFG0: DEVICE CONFIGURATION WORD 0 (CONTINUED)
PIC32MX5XX/6XX/7XX
DS61156F-page 163

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