PIC32MX564F128HT-I/MR Microchip Technology, PIC32MX564F128HT-I/MR Datasheet - Page 246
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PIC32MX564F128HT-I/MR
Manufacturer Part Number
PIC32MX564F128HT-I/MR
Description
64 PINS, 128KB Flash, 32KB RAM, 80 MHz, USB, CAN, 4 DMA 64 QFN 9x9x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.PIC32MX575F256H-80IMR.pdf
(254 pages)
Specifications of PIC32MX564F128HT-I/MR
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Processor Series
PIC32MX5x
Core
MIPS32
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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PIC32MX5XX/6XX/7XX
Revision E (July 2010)
Minor corrections were incorporated throughout the
document.
TABLE B-4:
DS61156F-page 246
High-Performance, USB, CAN and
Ethernet 32-bit Flash Microcontrollers
1.0 “Device Overview”
4.0 “Memory Organization”
Section Name
SECTION UPDATES
Removed the following Analog Feature: FV tolerant input pins
(digital pins only)
Updated the term LIN 1.2 support as LIN support for the peripheral
feature: Six UART modules with: RS-232, RS-485, and LIN support
Updated the value of 64-pin QFN/TQFP pin number for the following pin
names: PMA0, PMA1 and ECRSDV
The following register map tables were updated:
•
•
•
•
•
•
•
• Added note 2 to
• Updated the All Resets values for the following registers in
• Updated the All Resets values for the I2C2CON register in
Table
- Changed bits 24/8 to I2C5BIF in IFS1
- Changed bits 24/8-24/10 to SRIPL<2:0> in INTSTAT
- Changed bits 25/9/-24/8 to U5IS<1:0> in IPC12
- Added note 2
Table 4-3
- Changed bits 24/8-24/10 to SRIPL<2:0> in INTSTAT
- Changed bits 25/9-24/8 to U5IS<1:0> in IPC12
Table
- Changed bits 24/8 to I2C5BIF in IFS1
- Added note 2
Table
- Changed bits 24/8 to I2C5BIF in IFS1
- Changed bits 24/8 to I2C5BIE in IEC1
- Added note 2 references
Table
- Changed bits 24/8 to I2C5BIF in IFS1
- Changed bits 24/8 to I2C5BIE in IEC1
- Added note 2 references
Table
- Changed bit 24/8 to I2C5BIF in IFS1
- Updated the bit value of bit 24/8 as I2C5BIE for the IEC1 register.
- Added note 2
Table
- Changed bit 25/9 to I2C5SIF in IFS1
- Changed bit 24/8 as I2C5BIF in IFS1
- Changed bit 25/9 as I2C5SIE in IEC1
- Changed bit 24/8 as I2C5BIE in IEC1
- Added note 2 references
I2C3CON, I2C4CON, I2C5CON and I2C1CON.
4-2:
4-3:
4-4:
4-5:
4-6:
4-7:
through
Table 4-8
Revision F (December 2010)
The revision includes the following global update:
Other major changes are referenced by their respective
chapter/section in
Table
V
CAP
4-7:
Update Description
/V
DDCORE
Table
has been changed to: V
© 2010 Microchip Technology Inc.
B-4:
Table 4-12
Table
CAP
/V
4-11:
CORE
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