SST39SF040-45-4C-WHE-T Microchip Technology, SST39SF040-45-4C-WHE-T Datasheet - Page 8

• Manufacturer Part Number: SST39SF040-45-4C-WHE-T
• Description: 4.5V To 5.5V 4Mbit Multi-Purpose Flash 32 TSOP 8x14 Mm T/R
• Manufacturer: Microchip Technology

Specifications of SST39SF040-45-4C-WHE-T

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 4M (512K x 8)
• Speed: 45ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 32-TFSOP (0.315", 8.00mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

EOL Data Sheet
TABLE 5: DC Operating Characteristics V
TABLE 6: Recommended System Power-up Timings
TABLE 7: Capacitance
TABLE 8: Reliability Characteristics
©2010 Silicon Storage Technology, Inc.
Symbol
I
I
I
I
I
V
V
V
V
V
Symbol
T
T
Parameter
C
C
Symbol
N
T
I
DD
SB1
SB2
LI
LO
LTH
PU-READ
PU-WRITE
DR
IL
IH
IHC
OL
OH
I/O
IN
END
1. Typical conditions for the Active Current shown on the front data sheet page are average values at 25°C
2. Values are for 70 ns conditions. See the Multi-Purpose Flash Power Rating application note for further information.
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
2. N
1
1
1
1
(room temperature), and V
higher minimum specification.
1,2
END
1
1
endurance rating is qualified as a 10,000 cycle minimum for the whole device. A sector- or block-level rating would result in a
Parameter
Power Supply Current
Read
Program and Erase
Standby V
(TTL input)
Standby V
(CMOS input)
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Input High Voltage (CMOS)
Output Low Voltage
Output High Voltage
Parameter
Power-up to Read Operation
Power-up to Program/Erase Operation
Description
I/O Pin Capacitance
Input Capacitance
Parameter
Endurance
Data Retention
Latch Up
2
DD
DD
Current
Current
DD
(Ta = 25°C, f=1 Mhz, other pins open)
= 5V for SF devices. Not 100% tested.
V
DD
Min
2.0
2.4
-0.3
DD
Minimum Specification
= 4.5-5.5V
SST39SF010A / SST39SF020A / SST39SF040
1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
Limits
Max
100
100 + I
0.8
0.4
25
35
10
8
3
1
10,000
100
1
DD
Units
mA
mA
mA
µA
µA
µA
V
V
V
V
V
Test Conditions
Address input=V
V
CE#=V
CE#=WE#=V
CE#=V
CE#=V
V
V
V
V
V
I
I
OL
OH
Cycles
DD
IN
OUT
DD
DD
DD
Test Condition
Units
Years
=2.1 mA, V
=GND to V
=-400 µA, V
mA
=V
=V
=V
=V
Minimum
=GND to V
V
V
I/O
DD
DD
DD
DD
IN
IL
IH
IHC
100
100
, OE#=WE#=V
, V
= 0V
= 0V
Max
Min
Max
Max
, V
DD
DD
IL
=V
DD
DD
JEDEC Standard A103
JEDEC Standard A117
, OE#=V
DD
=V
JEDEC Standard 78
DD
, V
ILT
=V
DD
=V
DD
, V
/V
DD
DD
Test Method
Max
DD
IHT
Max
DD
=V
Min
S71147(02)-00-000
IH
IH
, at f=1/T
=V
Min
DD
, all I/Os open
Maximum
DD
Max
12 pF
Units
6 pF
Max
µs
µs
T5.10 1147(02)
T6.1 1147(02)
T7.0 1147(02)
T8.2 1147(02)
RC
Min
01/10