SST39VF3201B-70-4I-EKE Microchip Technology, SST39VF3201B-70-4I-EKE Datasheet

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SST39VF3201B-70-4I-EKE

Manufacturer Part Number
SST39VF3201B-70-4I-EKE
Description
2.7V To 3.6V 32Mbit Multi-Purpose Flash 48 TSOP 12x20 Mm TRAY
Manufacturer
Microchip Technology

Specifications of SST39VF3201B-70-4I-EKE

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
32M (2M x 16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TFSOP (0.472", 12.0mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Manufacturer
Quantity
Price
Part Number:
SST39VF3201B-70-4I-EKE
Manufacturer:
INF
Quantity:
52
Part Number:
SST39VF3201B-70-4I-EKE
Manufacturer:
ST
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Part Number:
SST39VF3201B-70-4I-EKE
Manufacturer:
SST
Quantity:
20 000
FEATURES:
• Organized as 2M x16
• Single Voltage Read and Write Operations
• Superior Reliability
• Low Power Consumption (typical values at 5 MHz)
• Hardware Block-Protection/WP# Input Pin
• Sector-Erase Capability
• Block-Erase Capability
• Chip-Erase Capability
• Erase-Suspend/Erase-Resume Capabilities
• Hardware Reset Pin (RST#)
PRODUCT DESCRIPTION
The SST39VF320xB devices are 2M x16 CMOS Multi-
Purpose Flash Plus (MPF+) manufactured with SST’s pro-
prietary, high-performance CMOS SuperFlash technology.
The split-gate cell design and thick-oxide tunneling injector
attain better reliability and manufacturability compared with
alternate approaches. The SST39VF320xB write (Pro-
gram or Erase) with a 2.7-3.6V power supply. These
devices conform to JEDEC standard pin assignments for
x16 memories.
Featuring
SST39VF320xB devices provide a typical Word-Program
time of 7 µsec. These devices use Toggle Bit or Data# Poll-
ing to indicate the completion of Program operation. To pro-
tect against inadvertent write, they have on-chip hardware
and Software Data Protection schemes. Designed, manu-
factured, and tested for a wide spectrum of applications,
these devices are offered with a guaranteed typical endur-
ance of 100,000 cycles. Data retention is rated at greater
than 100 years.
The SST39VF320xB devices are suited for applications that
require convenient and economical updating of program,
configuration, or data memory. For all system applications,
©2009 Silicon Storage Technology, Inc.
S71384-01-000
1
– 2.7-3.6V
– Endurance: 100,000 Cycles (Typical)
– Greater than 100 years Data Retention
– Active Current: 6 mA (typical)
– Standby Current: 4 µA (typical)
– Auto Low Power Mode: 4 µA (typical)
– Top Block-Protection (top 32 KWord)
– Bottom Block-Protection (bottom 32 KWord)
– Uniform 2 KWord sectors
– Uniform 32 KWord blocks
for SST39VF3202B
for SST39VF3201B
high
32 Mbit (x16) Multi-Purpose Flash Plus
performance
1/09
SST39VF640xB2.7V 64Mb (x16) MPF+ memories
SST39VF3201B / SST39VF3202B
Word-Program,
the
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
• Security-ID Feature
• Fast Read Access Time:
• Latched Address and Data
• Fast Erase and Word-Program:
• Automatic Write Timing
• End-of-Write Detection
• CMOS I/O Compatibility
• JEDEC Standard
• Packages Available
• All non-Pb (lead-free) devices are RoHS compliant
they significantly improve performance and reliability, while
lowering power consumption. They inherently use less
energy during Erase and Program than alternative flash
technologies. The total energy consumed is a function of
the applied voltage, current, and time of application. Since
for any given voltage range, the SuperFlash technology
uses less current to program and has a shorter erase time,
the total energy consumed during any Erase or Program
operation is less than alternative flash technologies. These
devices also improve flexibility while lowering the cost for
program, data, and configuration storage applications.
The SuperFlash technology provides fixed Erase and Pro-
gram times, independent of the number of Erase/Program
cycles that have occurred. Therefore the system software
or hardware does not have to be modified or de-rated as is
necessary with alternative flash technologies, whose Erase
and Program times increase with accumulated Erase/Pro-
gram cycles.
To meet high-density, surface mount requirements, the
SST39VF320xB devices are offered in 48-lead TSOP and
48-ball TFBGA packages. See Figure 2 and Figure 3 for
pin assignments.
– SST: 128 bits; User: 128 words
– 70 ns
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 35 ms (typical)
– Word-Program Time: 7 µs (typical)
– Internal V
– Toggle Bits
– Data# Polling
– Flash EEPROM Pin Assignments
– 48-lead TSOP (12mm x 20mm)
– 48-ball TFBGA (6mm x 8mm)
PP
Generation
These specifications are subject to change without notice.
MPF is a trademark of Silicon Storage Technology, Inc.
Data Sheet

Related parts for SST39VF3201B-70-4I-EKE

SST39VF3201B-70-4I-EKE Summary of contents

Page 1

... Mbit (x16) Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B SST39VF640xB2.7V 64Mb (x16) MPF+ memories FEATURES: • Organized as 2M x16 • Single Voltage Read and Write Operations – 2.7-3.6V • Superior Reliability – Endurance: 100,000 Cycles (Typical) – Greater than 100 years Data Retention • ...

Page 2

... Data# Polling and Toggle Bit. During the internal Pro- gram operation, the host is free to perform additional tasks. ©2009 Silicon Storage Technology, Inc. 32 Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B Any commands issued during the internal Program opera- tion are ignored. During the command sequence, WP# should be statically held high or low. ...

Page 3

... Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B Chip-Erase Operation The SST39VF320xB provide a Chip-Erase operation, which allows the user to erase the entire memory array to the “1” state. This is useful when the entire device must be quickly erased. The Chip-Erase operation is initiated by executing a six- byte command sequence with Chip-Erase command (10H) at address 555H in the last byte sequence ...

Page 4

... Hardware Block Protection The SST39VF3202B support top hardware block protec- tion, which protects the top 32 KWord block of the device. The SST39VF3201B support bottom hardware block pro- tection, which protects the bottom 32 KWord block of the device. The Boot Block address ranges are described in Table 2 ...

Page 5

... SST39VF3201B / SST39VF3202B Product Identification The Product Identification mode identifies the devices as the SST39VF3201B and SST39VF3202B, and the manu- facturer as SST. This mode may be accessed through software operations. Users may use the Software Product Identification operation to identify the part (i.e., using the device ID) when using multiple manufacturers in the same socket ...

Page 6

... FIGURE 1: Functional Block Diagram A15 A14 A13 A12 A11 A10 A9 A8 A19 A20 WE# RST# NC WP# NC A18 A17 FIGURE 2: Pin Assignments for 48-lead TSOP ©2009 Silicon Storage Technology, Inc. 32 Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B X-Decoder Control Logic Standard Pinout 9 10 Top View 11 12 Die ...

Page 7

... Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B FIGURE 3: pin assignments for 48-ball TFBGA TABLE 4: Pin Description Symbol Pin Name Functions Address Inputs To provide memory addresses During Sector-Erase A During Block-Erase A DQ -DQ Data Input/output To output data during Read cycles and receive input data during Write cycles. ...

Page 8

... Data Sheet TABLE 5: Operation Modes Selection Mode CE# Read V Program V Erase V Standby V Write Inhibit Product Identification Software Mode can but no other value ©2009 Silicon Storage Technology, Inc. 32 Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B OE# WE OUT High High OUT High OUT Address A IN ...

Page 9

... Valid Word-Addresses for Sec ID are from 000000H-000007H and 000008H to 000087H. 7. The device does not remain in Software Product ID Mode if powered down. 8. With A -A =0; SST Manufacturer ID = 00BFH, is read with SST39VF3201B Device ID = 235DH, is read with A SST39VF3202B Device ID = 235CH, is read with Most significant address for SST39VF320xB ...

Page 10

... Block Information ( Number of blocks 256B = block size) 32H 0000H blocks (003FH = 63) 33H 0000H 34H 0001H z = 256 x 256 Bytes = 64 KBytes/block (0100H = 256) ©2009 Silicon Storage Technology, Inc. 32 Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B 1 for SST39VF320xB -DQ : 100 millivolts 3 0 -DQ : 100 millivolts 3 0 pin) ...

Page 11

... Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute Maximum Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.) Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55° ...

Page 12

... This parameter is measured only for initial qualification and after a design or process change that could affect this parameter endurance rating is qualified as a 10,000 cycle minimum for the whole device. A sector- or block-level rating would result in a END higher minimum specification. ©2009 Silicon Storage Technology, Inc. 32 Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B 1 = 2.7-3.6V DD Limits Min Max ...

Page 13

... Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B AC CHARACTERISTICS TABLE 14: Read Cycle Timing Parameters V Symbol Parameter T Read Cycle Time RC T Chip Enable Access Time CE T Address Access Time AA T Output Enable Access Time CE# Low to Active Output CLZ 1 T OE# Low to Active Output OLZ 1 T CE# High to High-Z Output ...

Page 14

... SW0 Note Most significant address WP# must be held in proper logic state (V X can be V FIGURE 6: WE# Controlled Program Cycle Timing Diagram ©2009 Silicon Storage Technology, Inc. 32 Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B OLZ T CLZ DATA VALID for SST39VF320xB INTERNAL PROGRAM OPERATION STARTS ...

Page 15

... Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B ADDRESS A 555 MS CE CPH OE# WE# DQ XXAA 15-0 SW0 Note Most significant address for SST39VF320xB MS 20 WP# must be held in proper logic state (V X can but no other value. IL IH, FIGURE 7: CE# Controlled Program Cycle Timing Diagram ADDRESS A MS-0 ...

Page 16

... SIX-BYTE CODE FOR CHIP-ERASE 2AA 555 555 2AA XX55 XX80 XXAA XX55 SW1 SW2 SW3 SW4 µs prior to and 1 µs after the command sequence SST39VF3201B / SST39VF3202B T OES TWO READ CYCLES 1384 F07.0 WITH SAME OUTPUTS T SCE 555 XX10 SW5 S71384-01-000 1384 F08.0 1/09 ...

Page 17

... Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B ADDRESS A 555 MS-0 CE# OE WE# DQ XXAA 15-0 SW0 Note: This device also supports CE# controlled Block-Erase operation The WE# and CE# signals are interchangeable as long as minimum timings are met. (See Table 15 Block Address Most significant address for SST39VF320xB ...

Page 18

... CE# OE WE# DQ XXAA 15-0 SW0 Note: Device ID = 235DH for SST39VF3201B and 235CH for SST39VF3202B WP# must be held in proper logic state (V X can but no other value. IL IH, FIGURE 13: Software ID Entry and Read Three-Byte Sequence for CFI Query Entry 555 2AA ADDRESS A ...

Page 19

... Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B THREE-BYTE SEQUENCE FOR SOFTWARE ID EXIT AND RESET ADDRESS A 555 2AA 14-0 DQ XXAA 15-0 CE# OE WE# SW0 Note: WP# must be held in proper logic state (V X can but no other value. IL IH, FIGURE 15: Software ID Exit/CFI Exit THREE-BYTE SEQUENCE FOR CFI QUERY ENTRY ...

Page 20

... RST# CE#/OE# FIGURE 17: RST# Timing Diagram (When no internal operation is in progress RST# CE#/OE# FIGURE 18: RST# Timing Diagram (During Program or Erase operation) ©2009 Silicon Storage Technology, Inc. 32 Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B T RHR T RY End-of-Write Detection (Toggle-Bit) 20 1384 F15.0 1384 F16.0 ...

Page 21

... Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B V IHT INPUT V ILT AC test inputs are driven at V (0.9 V IHT for inputs and outputs are V (0 FIGURE 19: AC Input/Output Reference Waveforms TO DUT FIGURE 20: A Test Load Example ©2009 Silicon Storage Technology, Inc. V REFERENCE POINTS IT ) for a logic “1” and V (0 ...

Page 22

... Data Sheet FIGURE 21: Word-Program Algorithm ©2009 Silicon Storage Technology, Inc. 32 Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B Start Load data: XXAAH Address: 555H Load data: XX55H Address: 2AAH Load data: XXA0H Address: 555H Load Word Address/Word Data Wait for end of Program ( Data# Polling ...

Page 23

... Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B Internal Timer Program/Erase Initiated Wait SCE Program/Erase Completed FIGURE 22: Wait Options ©2009 Silicon Storage Technology, Inc. Toggle Bit Program/Erase Initiated Read word Read same No word No Does DQ 6 match? Yes Program/Erase Completed 23 Data Sheet Data# Polling ...

Page 24

... Read CFI data Address: 555H Wait T IDA Read CFI data FIGURE 23: Software ID/CFI Entry Command Flowcharts ©2009 Silicon Storage Technology, Inc. 32 Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B Sec ID Query Entry Command Sequence Load data: XXAAH Address: 555H Load data: XX55H Wait T IDA ...

Page 25

... Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B FIGURE 24: Software ID/CFI Exit Command Flowcharts ©2009 Silicon Storage Technology, Inc. Software ID Exit/CFI Exit/Sec ID Exit Command Sequence Load data: XXAAH Load data: XXF0H Address: 555H Address: XXH Load data: XX55H Wait T IDA Address: 2AAH Load data: XXF0H ...

Page 26

... Load data: XX10H Address: 555H Wait T SCE Chip erased to FFFFH FIGURE 25: Erase Command Sequence ©2009 Silicon Storage Technology, Inc. 32 Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B Sector-Erase Command Sequence Command Sequence Load data: XXAAH Address: 555H Load data: XX55H Address: 2AAH Load data: XX80H ...

Page 27

... XX XX XXX Valid Combinations for SST39VF3201B SST39VF3201B-70-4C-EKE SST39VF3201B-70-4C-B3KE SST39VF3201B-70-4I-EKE SST39VF3201B-70-4I-B3KE Valid Combinations for SST39VF3202B SST39VF3202B-70-4C-EKE SST39VF3202B-70-4C-B3KE SST39VF3202B-70-4I-EKE SST39VF3202B-70-4I-B3KE Note: Valid combinations are those products in mass production or will be in mass production. Consult your SST sales representative to confirm availability of valid combinations and to determine availability of new combinations. ...

Page 28

... Coplanarity: 0 Maximum allowable mold flash is 0. the package ends, and 0.25 mm between leads. FIGURE 26: 48-lead Thin Small Outline Package (TSOP) 12mm x 20mm, SST Package Code: EK ©2009 Silicon Storage Technology, Inc. 32 Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B 18.50 18.30 20.20 19.80 28 1.05 ...

Page 29

... Mbit Multi-Purpose Flash Plus SST39VF3201B / SST39VF3202B TOP VIEW 8.00 ± 0. CORNER SIDE VIEW SEATING PLANE Note: 1. Complies with JEDEC Publication 95, MO-210, variant 'AB-1', although some dimensions may be more stringent. 2. All linear dimensions are in millimeters. 3. Coplanarity: 0. Ball opening size is 0.38 mm (± 0.05 mm) ...

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