STK14C88-5C45M Cypress Semiconductor Corp, STK14C88-5C45M Datasheet - Page 7

• Manufacturer Part Number: STK14C88-5C45M
• Description: STK14C88-5C45M
• Manufacturer: Cypress Semiconductor Corp

Specifications of STK14C88-5C45M

• Format - Memory: RAM
• Memory Type: NVSRAM (Non-Volatile SRAM)
• Memory Size: 256K (32K x 8)
• Speed: 45ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -55°C ~ 125°C
• Package / Case: 32-CDIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Document Number: 001-52038 Rev. *B
Notes
SRAM Write Cycle #1 and #2
(VCC = 5.0V ± 10%)
NO.
9. If W is low when E goes low, the outputs remain in the high impedance state.
10. E or W must be
11. HSB must be high during SRAM write cycles.
12
13
14
15
16
17
18
19
20 t
21
WLQZ
t
t
t
t
t
t
t
t
t
WLWH
WHQX
DVWH
WHDX
AVWH
WHAX
ELWH
AVWL
AVAV
#1
[8, 9]
ADDRESS
DATA OUT
ADDRESS
DATA OUT
DATA IN
≥
DATA IN
V
Symbols
IH
t
t
t
t
t
t
W
t
t
E
WLEH
DVEH
EHDX
ELEH
AVEH
EHAX
AVAV
AVEL
during address transitions.
[4]
W
#2
E
Alt.
t
t
t
t
t
t
t
t
t
t
t
WC
WP
CW
DW
AW
WR
OW
t
DH
WZ
AVEL
AS
AVWL
18
18
PREVIOUS DATA
Figure 6. SRAM Write Cycle 1: W Controlled
Figure 7. SRAM Write Cycle 2: E Controlled
Write Cycle Time
Write Pulse Width
Chip Enable to End of Write
Data Setup to End of Write
Data Hold after End of Write
Address Setup to End of Write
Address Setup to Start of Write
Address Hold after End of Write
Write Enable to Output Disable
Output Active after End of Write
t
AVEH
t
17
WLQZ
20
Parameter
t
AVWH
17
t
WLWH
13
t
t
ELWH
ELEH
t
14
WLEH
14
t
t
13
AVAV
AVAV
HIGH IMPEDANCE
12
12
t
DVEH
15
HIGH IMPEDANCE
t
DVWH
15
DATA VALID
STK14C88-25 STK14C88-35 STK14C88-45
DATA VALID
Min
25
20
20
10
20
0
0
0
5
Max
10
[10, 11]
[10, 11]
t
EHDX
t
t
16
WHDX
EHAX
t
13
19
WHAX
19
Min
35
25
25
12
25
0
0
0
5
t
WHQX
21
Max
13
Min
45
30
30
15
30
0
0
0
5
STK14C88
Max
15
Page 7 of 19
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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