ADV7181CBCPZ Analog Devices Inc, ADV7181CBCPZ Datasheet - Page 12

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ADV7181CBCPZ

Manufacturer Part Number
ADV7181CBCPZ
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV7181CBCPZ

Adc/dac Resolution
10b
Screening Level
Industrial
Package Type
LFCSP EP
Pin Count
64
Lead Free Status / RoHS Status
Compliant
ADV7181C
DETAILED FUNCTIONALITY
ANALOG FRONT END
The analog front-end section contains four high quality 10-bit
ADCs, and the six analog input channel mux enables multisource
connection without the requirement of an external mux. It also
contains
SDP PIXEL DATA OUTPUT MODES
The SDP pixel data output modes are the following:
CP PIXEL DATA OUTPUT MODES
CP pixel data output modes include single data rate (SDR) and
double data rate (DDR) as follows:
Four current and voltage clamp control loops to ensure
that any dc offsets are removed from the video signal
SCART functionality and SD RGB overlay on CVBS that
are controlled by fast blank input
Four internal antialias filters to remove out-of-band noise
on standard definition input video signals
8-/10-bit ITU-R BT.656 4:2:2 YCrCb with embedded time
codes and/or HS, VS, and FIELD
16-/20-bit YCrCb with embedded time codes and/or HS,
VS, and FIELD
SDR 8-/10-bit 4:2:2 YCrCb for 525i, 625i
SDR 16-/20-bit 4:2:2 YCrCb for all standards
DDR 8-/10-bit 4:2:2 YCrCb for all standards
DDR 12-bit 4:4:4 RGB for graphics inputs
Rev. C | Page 12 of 20
COMPOSITE AND S-VIDEO PROCESSING
Composite and S-Video processing features offer support for
NTSC M/J, NTSC 4.43, PAL B/D/I/G/H, PAL60, PAL M, PAL N,
and SECAM (B, D, G, K, and L) standards in the form of CVBS
and S-Video as well as super-adaptive, 2D, 5-line comb filters
for NTSC and PAL give superior chrominance and luminance
separation for composite video. They also include full automatic
detection and autoswitching of all worldwide standards (PAL,
NTSC, and SECAM) and automatic gain control with white
peak mode to ensure the video is always processed without loss
of the video processing range. Other features are
Adaptive Digital Line Length Tracking (ADLLT™)
Proprietary architecture for locking to weak, noisy, and
unstable sources from VCRs and tuners
IF filter block to compensate for high frequency luma
attenuation due to tuner SAW filter
Chroma transient improvement (CTI)
Luminance digital noise reduction (DNR)
Color controls including hue, brightness, saturation,
contrast, and Cr and Cb offset controls
Certified Macrovision® copy protection detection on
composite and S-Video for all worldwide formats
(PAL/NTSC/SECAM)
4× oversampling (54 MHz) for CVBS, S-Video, and
YUV modes
Line-locked clock output (LLC)
Letterbox detection support
Free-run output mode to provide stable timing when no
video input is present
Vertical blanking interval data processor, including teletext,
video programming system (VPS), vertical interval time
codes (VITC), closed captioning (CC) and extended data
service (EDS), wide screen signaling (WSS), copy generation
management system (CGMS), and compatibility with
GemStar™ 1×/2× electronic program guide
Clocked from a single 28.63636 MHz crystal
Subcarrier frequency lock (SFL) output for downstream
video encoder
Differential gain typically 0.5%
Differential phase typically 0.5°

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