LTC1164-8CSW#TRPBF Linear Technology, LTC1164-8CSW#TRPBF Datasheet - Page 5

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LTC1164-8CSW#TRPBF

Manufacturer Part Number
LTC1164-8CSW#TRPBF
Description
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1164-8CSW#TRPBF

Order Filter (max)
8th
Single Supply Voltage (typ)
5V
Dual Supply Voltage (typ)
±3/±5V
Power Supply Requirement
Single/Dual
Single Supply Voltage (min)
4.75V
Single Supply Voltage (max)
16V
Dual Supply Voltage (min)
±2.375V
Dual Supply Voltage (max)
±8V
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Package Type
SOIC W
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC1164-8CSW#TRPBFLTC1164-8CSW
Manufacturer:
LINEAR
Quantity:
6
PIN
V
and the V
capacitor to a reliable ground plane. The filter’s power
supplies should be isolated from other digital or high
voltage analog supplies. A low noise linear supply is
recommended. Using a switching power supply will
lower the signal-to-noise ratio of the filter. The power
supply during power-up should have a slew rate of less
than 1V/μs.
For dual supply operation if the V
the V
supply, a signal diode on each supply pin to ground will
prevent latchup. Figures 1 and 2 show typical connections
for dual and single supply operation.
f
source with a square wave output and 50% duty cycle
(±10%) is an adequate clock source for the device. The
CLK
+
, V
U
(Pin 11): Clock Input Pin. Any TTL or CMOS clock
OR EQUIVALENT
FUNCTIONS
supply or the V
(Pins 4, 12): Power Supply Pins. The V
U
*1N4148
(Pin 12) should be bypassed with a 0.1μF
5V
V
U
IN
+
supply is applied before the V
340k
5V
0.1μF
R
1μF
IN
(14-Lead PDIP)
15k
10k
+
1
2
3
4
5
6
7
supply is applied before
LTC1164-8
Figure 2. Single Power Supply Operation (Gain = 1)
V
Figure 1. Dual Power Supply Operation (Gain = 1)
IN
0.1μF
340k
R
IN
14
13
12
11
10
9
8
+
1
2
3
4
5
6
7
(Pin 4)
f
CLK
*FOR SURFACE MOUNT CIRCUITS
LTC1164-8
USE MOTOROLA DIODE MBR0530
OR EQUIVALENT
+
0.1μF
power supply for the clock source should not be the filter’s
power supply. The analog ground for the filter should be
connected to the clock’s ground at a single point only.
Table 1 shows the clock’s low and high level threshold
values for dual or single supply operation. A pulse genera-
tor can be used as a clock source provided the high level
on-time is at least 1μs. Sine waves are not recommended
for clock input frequencies less than 100kHz. The clock’s
rise or fall time should be equal to or less than 1μs.
Table 1. Clock Source High and Low Threshold Levels
POWER SUPPLY
Single Supply = 5V
Single Supply = 12V
Dual Supply = ±2.5V
Dual Supply = ±5V
Dual Supply = ±7.5V
14
13
12
11
10
9
8
1N4148*
OR EQUIVALENT
f
–5V
CLK
2
3
+
2
3
5V
61.9k
+
7
4
R
F
–5V
61.9k
5V
R
0.1μF
HIGH LEVEL
7
4
6
F
>1.45V
>7.80V
>0.73V
>1.45V
>2.18V
LTC1164-8 • F02
0.1μF
0.1μF
6
V
OUT
LTC1164-8 • F01
V
OUT
LTC1164-8
LOW LEVEL
<– 2.0V
<0.5V
<6.5V
<0.5V
<0.5V
11648fb
5

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