AD830JRZ-REEL7 Analog Devices Inc, AD830JRZ-REEL7 Datasheet - Page 14
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AD830JRZ-REEL7
Manufacturer Part Number
AD830JRZ-REEL7
Description
Manufacturer
Analog Devices Inc
Datasheet
1.AD830JRZ-REEL7.pdf
(16 pages)
Specifications of AD830JRZ-REEL7
Single Supply Voltage (typ)
Not RequiredV
Single Supply Voltage (min)
Not RequiredV
Single Supply Voltage (max)
Not RequiredV
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Compliant
AD830
AC-COUPLED LINE RECEIVER
The AD830 is configurable as an ac-coupled differential ampli-
fier on a single- or bipolar-supply voltage. All that is needed is
inclusion of a few noncritical passive components, as illustrated
in Figure 28. A simple resistive network at the X G
establishes a common-mode bias. Here, the common mode is
centered at 6 V, but in principle can be any voltage within
the common-mode limits of the AD830. The 10 kΩ resistors
to each input bias the X G
ance to keep the input coupling corner frequency low, but not
too large so that residual bias current induced offset voltage
Figure 29. Common-Mode Rejection vs. Frequency for
Line Receiver
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
Figure 26. Differential Gain and Phase for the
Circuit of Figure 25
120
100
80
60
40
20
5
10
WITH CIRCUIT TRIMMED USING
EXTERNAL 2k
6
100
WITHOUT EXTERNAL
2k
GAIN
7
POTENTIOMETER
PHASE
8
1k
SUPPLY VOLTAGE –
POTENTIOMETER
Z
CM
M
9
FREQUENCY – Hz
SIGNAL
INPUT
stage with sufficiently high imped-
10k
10
10k
10k
100k
R
11
10 F
T
10 F
10k
+V
V
S
12
GAIN = +2
R
FREQ = 3.58MHz
0 TO 0.7V
1M
L
*
10k
2k *
= 150
OPTIONAL TUNING FOR IMPROVING
VERY LOW FREQUENCY CMR.
13
Figure 28. AC-Coupled Line Receiver
10M
14
1
2
3
4
M
15
100M
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
input
G
G
M
M
–14–
C
becomes troublesome. For dual-supply operation, the 10 kΩ
resistors may go directly to ground. The output common is
conveniently set by a Zener diode for a low impedance reference
to preserve the high frequency CMR. However, a simple resis-
tive divider will work fine and good high frequency CMR can be
maintained by placing a compensating resistor in series with the
+Y input. The excellent CMRR response of the circuit is shown
in Figure 29. A plot of the 0.1 dB flatness from 10 Hz is also
shown. With the use of 10 µF capacitors, the CMR is >90 dB
down to a few tens of hertz. This level of performance is almost
impossible to achieve with discrete solutions.
AD830
A = 1
Figure 27. 0.1 dB Gain Flatness for the Circuit of
Figure 25
Figure 30. Amplitude Response vs. Frequency for
Line Receiver
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
–0.7
–0.8
0.2
0.1
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
–0.7
–0.8
–0.9
0.1
0
8
7
6
5
1N4736
10k
0
+12V
10
GAIN = +2
R
0.1 F
L
1000 F
= 150
+12V
4.7k
100
6.8V
V
OUT
100k
75
1k
FREQUENCY – Hz
FREQUENCY – Hz
CABLE
COAX
75
10k
1M
75
V
S
=
100k
V
S
10V
=
10M
5V
1M
V
S
=
15V
10M
100M
REV. B