SGTL5000XNAA3R2 Freescale, SGTL5000XNAA3R2 Datasheet - Page 45

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SGTL5000XNAA3R2

Manufacturer Part Number
SGTL5000XNAA3R2
Description
Manufacturer
Freescale
Datasheet

Specifications of SGTL5000XNAA3R2

Single Supply Voltage (typ)
1.8/2.5/3.3V
Lead Free Status / RoHS Status
Compliant

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miscellaneous controls for the clock block.
Table 33. CHIP_CLK_TOP_CTRL 0x0034
Analog Integrated Circuit Device Data
Freescale Semiconductor
15:12
BITS
10:4
Table 33, CHIP_CLK_TOP_CTRL 0x0034
15
2:0
11
3
14
INPUT_FREQ_DIV2
ENABLE_INT_OSC
RSVD
RESERVED
FIELD
RSVD
RSVD
13
12
RW
RW
RW
RW
RW
RO
11
RESET
0x0
0x0
0x0
0x0
0x0
10
has the
Reserved
Setting this bit enables an internal oscillator to be used for the zero cross detectors,
the short detect recovery, and the charge pump. This will allow the I
off while still operating an analog signal path. This bit can be kept on when the I
clock is enabled, but the I
when I
Reserved
SYS_MCLK divider before PLL input
0x0 = pass through
0x1 = SYS_MCLK is divided by 2 before entering PLL
This must be set when the input clock is above 17 Mhz. This has no effect when the
PLL is powered down.
Reserved
9
2
S is present.
8
RSVD
7
2
S clock is more accurate so it is preferred to clear this bit
6
DEFINITION
5
4
FUNCTIONAL DEVICE OPERATION
3
PROGRAMMING EXAMPLES
2
2
S clock to be shut
RSVD
1
SGTL5000
0
2
S
45

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