IDT92HD81B1X5NLGXYCX8 IDT, Integrated Device Technology Inc, IDT92HD81B1X5NLGXYCX8 Datasheet - Page 64
IDT92HD81B1X5NLGXYCX8
Manufacturer Part Number
IDT92HD81B1X5NLGXYCX8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT92HD81B1X5NLGXYCX8.pdf
(289 pages)
Specifications of IDT92HD81B1X5NLGXYCX8
Lead Free Status / RoHS Status
Compliant
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SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
92HD81
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
Field Name
S3D3ColdSup
Rsvd
D3ColdSup
D3Sup
D2Sup
D1Sup
D0Sup
Field Name
GPIWake
Reg
Get
Set
7.4.7.
Byte 4 (Bits 31:24)
AFG (NID = 01h): GPIOCnt
Bits
29
Codec state intended during system S3 state: 1 = D3Hot, 0 = D3Cold.
On YB revs & prior, this was called LPD3Sup & default was 0h
28:5
Reserved.
4
D3Cold power state support: 1 = yes, 0 = no.
3
D3 power state support: 1 = yes, 0 = no.
2
D2 power state support: 1 = yes, 0 = no.
1
D1 power state support: 1 = yes, 0 = no.
0
D0 power state support: 1 = yes, 0 = no.
Bits
31
Wake capability. Assuming the Wake Enable Mask controls are enabled,
GPIO's configured as inputs can cause a wake (generate a Status Change
event on the link) when there is a change in level on the pin.
Byte 3 (Bits 23:16)
R/W
R
R
R
R
R
R
R
R/W
R
F0011h
Default
1h
000000h
1h
1h
1h
1h
1h
Default
1h
64
Byte 2 (Bits 15:8)
Reset
N/A (Hard-coded)
N/A (Hard-coded)
N/A (Hard-coded)
N/A (Hard-coded)
N/A (Hard-coded)
N/A (Hard-coded)
N/A (Hard-coded)
Reset
N/A (Hard-coded)
92HD81
Byte 1 (Bits 7:0)
PC AUDIO
V 0.987 11/09
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