LTC1553LCSW#TRM Linear Technology, LTC1553LCSW#TRM Datasheet - Page 18

• Manufacturer Part Number: LTC1553LCSW#TRM
• Manufacturer: Linear Technology

Specifications of LTC1553LCSW#TRM

• Lead Free Status / RoHS Status: Not Compliant

APPLICATIONS
LTC1553L
3. The small signal resistors and capacitors for frequency
4. The V
18
ground plane at a single point, preferably at a fairly quiet
point in the circuit such as close to the output capaci-
tors. This is not always practical, however, due to
physical constraints. Another reasonably good point to
make this connection is between the output capacitors
and the source connection of the low side FET Q2. Do
not tie this single point ground in the trace run between
the low side FET source and the input capacitor ground,
as this area of the ground plane will be very noisy.
compensation and soft start should be located very
close to their respective pins and the ground ends
connected to the signal ground pin through a separate
trace. Do not connect these parts to the ground plane!
close to the LTC1553L as possible. The 10 F bypass
CC
and PV
V
OUT
CC
U
+
decoupling capacitors should be as
C
INFORMATION
OUT
BOLD LINES INDICATE
HIGH CURRENT PATHS
L
U
O
C
IN
+
Q1
Q2
V
W
IN
Figure 10. LTC1553L Layout Diagram
+
10 F
U
C
10 F
SS
R
+
IMAX
C1
PV
CC
R
IFB
R
C
C
0.1 F
5. The (+) plate of C
6. The SENSE pin is very sensitive to pickup from the
7. OUTEN is a high impedance input and should be
8. Kelvin sense I
0.1 F
C
capacitors shown at V
optimum regulation performance.
possible to the drain of the upper MOSFET. An addi-
tional 1 F ceramic capacitor between V
ground is recommended.
switching node. Care should be taken to isolate SENSE
from possible capacitive coupling to the inductor switch-
ing signal. A 0.1 F is required between the SENSE pin
and the SGND pin next to the LTC1553L.
externally pulled up to a logic HIGH for normal
operation.
10
1
2
3
4
6
7
8
9
5
0.1 F
G2
PV
GND
SGND
V
SENSE
I
I
SS
COMP
MAX
FB
CC
CC
LTC1553L
PWRGD
OUTEN
FAULT
VID0
VID1
VID2
VID3
VID4
MAX
OT
G1
20
19
18
17
16
15
14
13
12
11
IN
and I
should be connected as close as
VID0
VID1
VID2
VID3
VID4
CC
FB
at Q1 drain and source pins.
and PV
5.6k
1153L F10
5.6k
CC
5.6k
will help provide
IN
and power