PI3HDMI201ZFEX Pericom Semiconductor, PI3HDMI201ZFEX Datasheet - Page 10

• Manufacturer Part Number: PI3HDMI201ZFEX
• Manufacturer: Pericom Semiconductor

Specifications of PI3HDMI201ZFEX

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Notes:
1. All typical values are at 25
2.
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Switching Characteristics
Application Information
Supply Voltage
All V
TMDS inputs
Standard TMDS terminations have already been integrated into Pericom’s PI3HDMI201 device. Therefore, external terminations
are not required. Any unused port must be left fl oating and not tied to GND.
DDC I/O Pins (SCL, SCL_SINK, SDA, SDA_SINK)
Control and Status Pins (SEL, HPD_SINK, HPD)
TMDS Differential Pins (Dx±, CLK±)
t
Symbol
t
t
t
are tied together.
pd(DDC)
pd(HPD)
sx(HPD)
sk(o)
t
t
t
t
t
jit(pp)
jit(pp)
sk(D)
sk(p)
sk(o)
tpd
t
t
t
t
DE
SX
dis
t
t
en
DD
r
f
is the magnitude of the difference in propagation delay times between any specifi ed terminals of channel 2 to 4 of a device when inputs
pins are recommended to have a 0.1μF capacitor tied from V
Intra-pair differential skew
Inter-pair differential skew
Peak-to-peak output jitter from CLK±
residual jitter
Peak-to-peak output jitter from
Dx± residual jitter
De-emphasis duration
Select to switch output
Enable time
Disable time
Propagation delay from SCLn to
SCL_SINK or SDAn to SDA_SINK or
SDA_SINK to SDAn
Propagation delay (from HPD_SINK to
the active port of HPD)
Switch time (from port select to the lat-
est valid status of HPD)
Propagation delay
Differential output signal rise time
(20% - 80%)
Differential output signal fall time
(20% - 80%)
Pulse skew
ADVANCE INFORMATION - COMPANY CONFIDENTIAL
°
C and with a 3.3V supply.
Parameter
(over recommended operating conditions unless otherwise noted)
(2)
pre-emphasis/de-emphasis = 0dB,
Dx±A, B = 1.65 Gbps HDMI
pattern, x = 0, 1, 2
CLK±A, B = 165 MHz clock
de-emphasis = -3.5dB, Dx±A, B =
250 Mbps HDMI
x = 0, 1, 2
CLK±A, B = 25 MHz clock
C
C
V
pre-emphasis/de-emphasis = 0dB
L
L
DD
= 10pF
= 10pF
= 3.3V, R
10
Test Conditions
T
DD
= 50-Ohm,
TM
to GND to fi lter supply noise
Optimized Equalization for Enhanced Signal Integrity
data pattern,
09-0017
TM
2:1 Active HDMI™ Compatible Switch with
data
Min.
75
75
Typ.
240
0.4
10
23
15
18
2
3
(1)
PS8957B
Max.
2000
240
240
100
200
2.5
6.0
6.5
50
50
30
50
10
10
PI3HDMI201
Units
ps
ns
ns
ns
07/29/09