LM1237BDBC/NA/NOPB National Semiconductor, LM1237BDBC/NA/NOPB Datasheet - Page 6
![no-image](/images/manufacturer_photos/0/4/469/national_semiconductor_sml.jpg)
LM1237BDBC/NA/NOPB
Manufacturer Part Number
LM1237BDBC/NA/NOPB
Description
Manufacturer
National Semiconductor
Datasheet
1.LM1237BDBCNANOPB.pdf
(42 pages)
Specifications of LM1237BDBC/NA/NOPB
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Package Type
MDIP
Lead Free Status / RoHS Status
Compliant
www.national.com
LM1253A Compatibility
In order to maintain register compatibility with the LM1253A preamplifier datasheet assignments for bias and brightness, the color
assignments are recommended as shown in Table 2. If datasheet compatibility is not required, then the DAC assignments can be
arbitrary.
OSD vs Video Intensity
The OSD amplitude has been increased over the LM1253A level. During monitor alignment, the three gain registers are used to
achieve the desired front of screen color balance. This also causes the OSD channels to be adjusted accordingly, since these are
inserted into the video channels prior to the gain attenuators. This provides the means to fine tune the intensity of the OSD relative
to the video as follows. If a typical starting point for the alignment is to have the gains at maximum (0x7F) and the contrast at 0x55,
the resultant OSD intensity will be higher than if the starting point is with the gains at 0x55 and the contrast at maximum (0x7F).
This tradeoff allows fine tuning the final OSD intensity relative to the video. In addition, the OSD contrast register, 0x8438 [4:3],
provides 4 major increments of intensity. Together, these allow setting the OSD intensity to the most pleasing level.
Typical Performance Characteristics
System Interface Signals
The Horizontal and Vertical Blanking and the Clamping input signals are important for proper functionality of the LM1237. Both
blanking inputs must be present for OSD synchronization. In addition, the Horizontal blanking input also assists in setting the
proper cathode black level, along with the Clamping pulse. The Vertical blanking input initiates a blanking level at the LM1237
outputs which is programmable from 3 to 127 lines (we recommend at least 10). This can be optionally disabled so there is no
vertical blanking.
Figure 2 and Figure 3 show the case where the Horizontal and Vertical inputs are logic levels. Figure 2 shows the smaller pin 24
voltage superimposed on the horizontal blanking pulse input to the neck board with R
voltage at pin 24 is clamped to about 1 volt when the pin is sinking current. Figure 3 shows the smaller pin 1 voltage
superimposed on the vertical blanking input to the neck board with C
correspond to the application circuit of Figure 15.
FIGURE 2. Logic Horizontal Blanking
LM1237 Pin:
Assignment:
TABLE 2. LM1253A Compatibility
DAC 1
Blue
20023454
DAC Bias Outputs
DAC 2
Green
V
6
CC
= 5V, T
4
jumpered and R
DAC 3
A
Red
= 25˚C unless otherwise specified
FIGURE 3. Logic Vertical Blanking
H
Brightness
= 4.7K and C
DAC 4
V
= 4.7K. These component values
17
= 0.1µF. Note where the
20023455