AD1893JNZ Analog Devices Inc, AD1893JNZ Datasheet - Page 9

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AD1893JNZ

Manufacturer Part Number
AD1893JNZ
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD1893JNZ

Lead Free Status / RoHS Status
Compliant
REV. A
Figure 4. Polyphase Filter Bank Model—Conceptual Block
Diagram
SIGNAL
INPUT
POLYPHASE FILTER N-1
POLYPHASE FILTER N
POLYPHASE FILTER 1
POLYPHASE FILTER 2
POLYPHASE FILTER 3
POLYPHASE FILTER 4
POLYPHASE FILTER 5
POLYPHASE FILTER 6
POLYPHASE FILTER 7
AMP
Figure 3. Four Polyphase Subfilters Realigned to Coarse Time Grid
SUBFILTER COEFFICIENTS
ALIGNED TO THE LEFT
TRACKING
SAMPLE
CIRCUIT
SELECT
CLOCK
T
N TO 1
SIN
MUX
= 1/F
SIN
SIGNAL
OUTPUT
TIME
–9–
PHASE
The full set of subfilters can be considered to form a parallel
bank of “polyphase” filters which have decrementing, linear
phase group delays. All of the polyphase filters conceptually
process the input signal simultaneously, as illustrated in Figure
4, at the input sample rate.
Asynchronous sample rate conversion under the polyphase filter
bank model is accomplished by selecting the output of a particu-
lar polyphase filter on the basis of the temporal relationship
between the input sample clock and the output sample clock
events. Figure 5 shows the desired filter group delay as a func-
tion of the relative time difference between the current output
sample clock and the last input sample clock. If an output
sample is requested late in the input sample period, then a short
filter delay is required, and if an output sample is requested
early in the input sample period, then a long filter delay is re-
quired. This nonintuitive result arises from the fact that FIR
filters always produce some delay, so that selecting a filter with
shorter delay moves the interpolated sample closer to the newest
input sample.
DELAY = NOMINAL
DELAY = NOMINAL
DELAY = NOMINAL – .25/F
DELAY = NOMINAL – .5/F
DELAY = NOMINAL – .75/F
F
F
F
F
F
SIN
SIN
SIN
SIN
SIN
/2
/2
/2
/2
/2
FREQ
SIN
SIN
SIN
AD1893

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