D3965MMA7660FC Freescale, D3965MMA7660FC Datasheet - Page 22

• Manufacturer Part Number: D3965MMA7660FC
• Manufacturer: Freescale

Specifications of D3965MMA7660FC

• Operating Supply Voltage (min): 2.4V
• Operating Supply Voltage (typ): 2.8V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 3mm
• Product Height (mm): 1mm
• Product Length (mm): 3mm
• Mounting: Surface Mount
• Pin Count: 10
• Lead Free Status / RoHS Status: Compliant

SERIAL INTERFACE
Serial-Addressing
Data Line (SDA) and a Serial Clock Line (SCL) to achieve bi-directional communication between master(s) and slave(s). A
master (typically a microcontroller) initiates all data transfers to and from the device, and generates the SCL clock that
synchronizes the data transfer.
SDA. The device’s SCL line operates only as an input. A pull-up resistor, typically 4.7 kΩ, is required on SCL if there are multiple
masters on the 2-wire interface, or if the master in a single-master system has an open-drain SCL output.
plus R/W bit, a register address byte, one or more data bytes, and finally a STOP condition.
Start and Stop Conditions
START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with
the slave, it issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another
transmission.
Bit Transfer
Sensors
Freescale Semiconductor
MMA7660FC operates as a slave that sends and receives data through an I
The device’s SDA line operates as both an input and an open-drain output. A pull-up resistor, typically 4.7 kΩ, is required on
Each transmission consists of a START condition
Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a
One data bit is transferred during each clock tap. See
SDA
SDA
SCL
SCL
t HD STA
SDA
SCL
CONDIT ION
ST ART
CONDITION
START
S
t LOW
DATA LINE STABLE
t R
DATA VALID
t HIGH
t SU DAT
Figure 7. 2-Wire Serial Interface Timing Details
t F
Figure 8. Start and Stop Conditions
t HD DAT
Figure 9. Bit Transfer
(Figure
DATA ALLOWED
Figure
t SU STA
CHANGE OF
7) sent by a master, followed by MMA7660FC's 7-bit slave address
REPEAT ED ST ART
9. The data on SDA must remain stable while SCL is high.
CONDIT ION
t HD STA
2
C 2-wire interface. The interface uses a Serial
t SU STO
CONDITION
CONDIT ION
ST OP
STOP
P
t BUF
CONDIT ION
MMA7660FC
ST ART
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