JM38510/13903BIA Analog Devices Inc, JM38510/13903BIA Datasheet - Page 3

• Manufacturer Part Number: JM38510/13903BIA
• Manufacturer: Analog Devices Inc

Specifications of JM38510/13903BIA

• Number Of Elements: 1
• Output Type: Single
• Power Supply Requirement: Dual
• Single Supply Voltage (typ): Not RequiredV
• Single Supply Voltage (min): Not RequiredV
• Single Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (typ): ±15V
• Dual Supply Voltage (min): ±10V
• Dual Supply Voltage (max): ±22V
• Operating Temperature Classification: Military
• Mounting: Through Hole
• Pin Count: 10
• Package Type: TO-100
• Lead Free Status / RoHS Status: Not Compliant

Model
AD532JD
AD532JD/+
AD532KD
AD532KD/+
AD532JH
AD532KH
AD532JCHIPS
AD532SD
AD532SD/883B
JM38510/13903BCA –55°C to +125°C
AD532SE/883B
AD532SH
AD532SH/883B
JM38510/13903BIA –55°C to +125°C
AD532SCHIPS
FUNCTIONAL DESCRIPTION
The functional block diagram for the AD532 is shown in Figure
1, and the complete schematic in Figure 2. In the multiplying
and squaring modes, Z is connected to the output to close the
feedback around the output op amp. (In the divide mode, it is
used as an input terminal.)
The X and Y inputs are fed to high impedance differential
amplifiers featuring low distortion and good common-mode
rejection. The amplifier voltage offsets are actively laser trimmed
to zero during production. The product of the two inputs is
resolved in the multiplier cell using Gilbert’s linearized trans-
conductance technique. The cell is laser trimmed to obtain
V
to obtain low output impedance and make possible self-contained
operation. The residual output voltage offset can be zeroed at
V
be grounded.
OUT
OS
in critical applications . . . otherwise the V
= (X
1
– X
2
)(Y
1
COM
– Y
Y
Y
X
X
Temperature
Ranges
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
2
1
1
2
2
)/10 volts. The built-in op amp is used
ORDERING GUIDE
R34
R2
R18
R9
R1
Q1
Q3
Q5
R4
R3
Q6
Q4
Q2
R5
R10
R6
Package
Descriptions
Side Brazed DIP
Side Brazed DIP
Side Brazed DIP
Side Brazed DIP
Header
Header
Chip
Side Brazed DIP
Side Brazed DIP
Side Brazed DIP
LCC
Header
Header
Header
Chip
R32
Q28
OS
Q7 Q8
Q9
Q11
R8
pin should
R12
R11
R13
R14
R15
Q14 Q15
Q12
Q10
R19
Q13
R16
Package
Options
D-14
D-14
D-14
D-14
H-10A
H-10A
D-14
D-14
D-14
E-20A
H-10A
H-10A
H-10A
R20
R21
Q19
Q16 Q17
Q18
R22
R24
R23
Q20
R25
V
V
X
Y
CHIP DIMENSIONS AND BONDING DIAGRAM
V
(WITH Z TIED TO OUTPUT)
X
X
Y
Y
OUT
C1
(1.575)
1
1
2
2
Q22
Q23
Q24
0.062
Q21
=
R26
X
(X
1
Q26
R27
1
– X
Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
R31
2
10V
) (Y
Q27
Q25
X
1
X
R28
R30
R29
– Y
2
2
)
R
R33
GND
V
OUTPUT
Z
R
OS
(2.718)
V
V
0.107
S
S
R
CAN
10R
V
OS
V
S
Z
OUTPUT
V
OS
AD532
Y
OUTPUT
2
Y
Z
V
1
S