AM41DL3244GT70I Spansion Inc., AM41DL3244GT70I Datasheet - Page 60
AM41DL3244GT70I
Manufacturer Part Number
AM41DL3244GT70I
Description
Manufacturer
Spansion Inc.
Datasheet
1.AM41DL3244GT70I.pdf
(65 pages)
Specifications of AM41DL3244GT70I
Operating Supply Voltage (max)
3.3V
Operating Temperature (max)
85C
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
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AC CHARACTERISTICS
Notes:
1. CE1#s controlled, if CIOs is low, ignore UB#s and LB#s timing.
2. t
3. t
4. t
5. A write occurs during the overlap (t
November 12, 2001
asserting UB#s or LB#s for a single byte operation or simultaneously asserting UB#s and LB#s for a double byte operation. A
write ends at the earliest transition when CE1#s goes high and WE# goes high. The t
to the end of write.
CW
WR
AS
is measured from the address valid to the beginning of write.
is measured from CE1#s going low to the end of write.
is measured from the end of write to the address change. t
Address
CE1#s
CE2s
UB#s, LB#s
WE#
Data In
Data Out
Figure 31. SRAM Write Cycle—CE1#s Control
WP
) of low CE#1 and low WE#. A write begins when CE1#s goes low and WE# goes low when
High-Z
P R E L I M I N A R Y
t
AS
(See Note 2 )
Am41DL32x4G
(See Note 3)
WR
applied in case a write ends as CE1#s or WE# going high.
t
t
AW
CW
t
(See Note 5)
WC
t
BW
t
WP
t
DW
Data Valid
WP
is measured from the beginning of write
t
WR
t
DH
(See Note 4)
High-Z
59
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