PF38F5070L0Y0BEA Micron Technology Inc, PF38F5070L0Y0BEA Datasheet - Page 68
PF38F5070L0Y0BEA
Manufacturer Part Number
PF38F5070L0Y0BEA
Description
Manufacturer
Micron Technology Inc
Datasheet
1.PF38F5070L0Y0BEA.pdf
(102 pages)
Specifications of PF38F5070L0Y0BEA
Operating Supply Voltage (max)
1.95V
Operating Temperature (max)
85C
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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The 2-cycle erase sequence cannot be interrupted with a bus write operation. For
example, an Erase Setup command must be immediately followed by the Erase Confirm
command in order to execute properly. If a different command is issued between the
setup and confirm commands, the partition is placed in read-status mode, the Status
Register signals a command sequence error, and all subsequent erase commands to
that partition are ignored until the Status Register is cleared.
The CPU can detect block erase completion by analyzing SR[7] of that partition. If an
error bit (SR[5,3,1]) was flagged, the Status Register can be cleared by issuing the
Clear Status Register command before attempting the next operation. The partition
remains in read-status mode until another command is written to its CUI. Any CUI
instruction can follow after erasing completes. The CUI can be set to read-array mode
to prevent inadvertent Status Register reads.
Numonyx™ Wireless Flash Memory (W18)
Numonyx™ Wireless Flash Memory (W18)
Order Number: 290701-18
November 2007
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