AM41DL3234GT85IS Spansion Inc., AM41DL3234GT85IS Datasheet - Page 12
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AM41DL3234GT85IS
Manufacturer Part Number
AM41DL3234GT85IS
Description
Manufacturer
Spansion Inc.
Datasheet
1.AM41DL3234GT85IS.pdf
(65 pages)
Specifications of AM41DL3234GT85IS
Lead Free Status / RoHS Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AM41DL3234GT85IS
Manufacturer:
AMD
Quantity:
5 696
Legend: L = Logic Low = V
Input, Byte Mode, SADD = Flash Sector Address, A
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = V
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector
6. If WP#/ACC = V
November 12, 2001
Operation
(Notes 1, 2)
Read from Flash
Write to Flash
Standby
Output Disable
Flash Hardware
Reset
Sector Protect
(Note 5)
Sector Unprotect
(Note 5)
Temporary Sector
Unprotect
Read from SRAM
Write to SRAM
If WP#/ACC = V
Block Protection and Unprotection” section.
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and
Unprotection”. If WP#/ACC = V
Table 1. Device Bus Operations—Flash Word Mode, CIOf = V
IL
ACC
IL
, the two outermost boot sectors remain protected. If WP#/ACC = V
, the boot sectors will be protected. If WP#/ACC = V
V
CE#f CE1#s CE2s OE# WE#
0.3 V
(9V), the program time will be reduced by 40%.
CC
H
H
X
X
L
L
L
L
L
IL
, CE1#s = V
IL
, H = Logic High = V
H
H
H
H
H
H
H
X
X
X
X
X
X
X
L
L
L
HH,
all sectors will be unprotected.
IL
and CE2s = V
H
H
H
X
L
X
L
X
L
X
L
X
L
X
L
X
L
H
X
H
H
X
H
H
X
X
L
L
P R E L I M I N A R Y
IH
, V
IN
H
X
H
H
X
X
H
L
L
L
L
IH
ID
= Address In, D
Am41DL32x4G
at the same time.
= 11.5–12.5 V, V
SA
X
X
X
X
X
X
X
X
X
X
X
A1 = H,
A6 = H,
A1 = H,
A6 = L,
SADD,
SADD,
A0 = L
A0 = L
Addr.
A
A
A
A
X
X
X
X
X
IN
IN
IN
IN
IN
IH
= Data In, D
HH
the boot sectors protection will be removed.
LB#s UB#s RESET#
= 9.0 ± 0.5 V, X = Don’t Care, SA = SRAM Address
X
X
X
X
X
X
X
X
H
H
L
L
L
L
L
IH
; SRAM Word Mode, CIOs = V
H
H
X
X
X
X
X
X
X
X
L
L
L
L
L
OUT
IH
, the two outermost boot sector protection
= Data Out
V
0.3 V
V
V
V
CC
H
H
H
H
H
L
ID
ID
ID
WP#/ACC
(Note 4)
(Note 4)
(Note 6)
(Note 6)
L/H
L/H
L/H
L/H
H
X
X
High-Z High-Z
High-Z High-Z
High-Z High-Z
High-Z
High-Z
DQ7–
D
D
D
DQ0
D
D
D
D
D
D
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
CC
DQ15–
High-Z
High-Z
High-Z
D
D
D
DQ8
D
D
D
OUT
OUT
OUT
X
X
IN
IN
IN
11