MT48LC8M16A2P-7E:G Micron Technology Inc, MT48LC8M16A2P-7E:G Datasheet - Page 35

• Manufacturer Part Number: MT48LC8M16A2P-7E:G
• Description: IC, SDRAM 128MB, SMD, 48LC8, TSOP54
• Manufacturer: Micron Technology Inc
• Type: SDRAMr
• Series: -r

Specifications of MT48LC8M16A2P-7E:G

• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 5.4ns
• Maximum Clock Rate: 143MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 165mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Access Time: RoHS Compliant
• Memory Case Style: TSOP
• No. Of Pins: 54
• Operating Temperature Range: 0°C To +70°C
• Operating Temperature Max: 70°C
• Operating Temperature Min: 0°C
• Package / Case: TSOP
• Memory Type: SDRAM
• Memory Configuration: 4 BLK (2M X 16)
• Interface Type: LVTTL
• Rohs Compliant: Yes
• Format - Memory: RAM
• Memory Size: 128M (8Mx16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Lead Free Status / RoHS Status: Compliant
• Lead Free Status / RoHS Status: Compliant

Figure 24:
Figure 25:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
WRITE-to-PRECHARGE
Terminating a WRITE Burst
Notes:
Notes:
COMMAND
COMMAND
1. DQM could remain LOW in this example if the WRITE burst is a fixed length of two.
COMMAND
1. DQMs are LOW.
t WR @ t CLK ≥ 15ns
t WR = t CLK < 15ns
ADDRESS
ADDRESS
ADDRESS
DQM
DQM
CLK
DQ
DQ
CLK
TRANSITIONING DATA
DQ
BANK a,
BANK a,
WRITE
WRITE
BANK,
COL n
COL n
WRITE
COL n
D
D
T0
D
n
n
T0
IN
IN
n
IN
TERMINATE
n + 1
n + 1
BURST
NOP
NOP
T1
D
D
T1
IN
IN
t
WR
35
PRECHARGE
COMMAND
(ADDRESS)
(a or all)
DON’T CARE
BANK
(DATA)
T2
NOP
T2
NEXT
t
WR
TRANSITIONING DATA
PRECHARGE
(a or all)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
BANK
T3
NOP
t RP
NOP
NOP
T4
t RP
128Mb: x4, x8, x16 SDRAM
BANK a,
ACTIVE
ROW
NOP
T5
©1999 Micron Technology, Inc. All rights reserved.
DON’T CARE
BANK a,
ACTIVE
ROW
NOP
T6
Operations