IS43R16160B-5BLI ISSI, Integrated Silicon Solution Inc, IS43R16160B-5BLI Datasheet - Page 25

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IS43R16160B-5BLI

Manufacturer Part Number
IS43R16160B-5BLI
Description
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
SDRAMr
Datasheet

Specifications of IS43R16160B-5BLI

Organization
16Mx16
Density
256Mb
Address Bus
15b
Access Time (max)
700ps
Maximum Clock Rate
200MHz
Operating Supply Voltage (typ)
2.5V
Package Type
FBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
Integrated Silicon Solution, Inc.
Rev. E
08/13/2010
IS43R83200B, IS46R83200B
IS43R16160B, IS46R16160B
DDR SDRAM (Rev.1.1)
I
I
OPERATIONAL DESCRIPTION
BANK ACTIVATE
the bank addresses (BA0,1). A row is indicated by the row address A0-12. The minimum activation
interval between one bank and the other bank is tRRD.
PRECHARGE
precharge all command (PREA,PRE+A10=H) is available to deactivate them at the same time. After
tRP from the precharge, an ACT command to the same bank can be issued.
The DDR SDRAM has four independent banks. Each bank is activated by the ACT command with
The PRE command deactivates the bank indicated by BA0,1. When multiple banks are active, the
Command
A0-9,11,12
A precharge command can be issued at BL/2 from a read command without data loss.
BA0,1
/CLK
DQS
CLK
A10
DQ
Preliminary
Preliminary
2 ACT command / tRCmin
ACT
Xa
Xa
00
tRRD
Bank Activation and Precharge All (BL=8, CL=2)
tRCD
ACT
01
Xb
Xb
READ
Y
0
00
tRCmin
256M Double Data Rate Synchronous DRAM
BL/2
tRAS
Qa0
Qa1
Qa2
Precharge all
Qa3
PRE
1
Qa4
Zentel Electronics Corporation
Qa5
tRP
Qa6
A3S56D30/40ETP
Qa7
ACT
Xb
Xb
01
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