MT46H32M16LFBF-6 IT:B Micron Technology Inc, MT46H32M16LFBF-6 IT:B Datasheet - Page 36
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MT46H32M16LFBF-6 IT:B
Manufacturer Part Number
MT46H32M16LFBF-6 IT:B
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet
1.MT46H32M16LFBF-6_ITB.pdf
(98 pages)
Specifications of MT46H32M16LFBF-6 IT:B
Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
6.5/5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
105mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
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- Download datasheet (4Mb)
DESELECT
NO OPERATION
LOAD MODE REGISTER
ACTIVE
PDF: 09005aef82d5d305
512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN
Notes:
Table 17: DM Operation Truth Table
The DESELECT function (CS# HIGH) prevents new commands from being executed by
the device. Operations already in progress are not affected.
The NO OPERATION (NOP) command is used to instruct the selected device to perform
a NOP. This prevents unwanted commands from being registered during idle or wait
states. Operations already in progress are not affected.
The mode registers are loaded via inputs A[0:n]. See mode register descriptions in Stand-
ard Mode Register (page 51) and Extended Mode Register (page 55). The LOAD
MODE REGISTER command can only be issued when all banks are idle, and a subse-
quent executable command cannot be issued until
The ACTIVE command is used to activate a row in a particular bank for a subsequent
access. The values on the BA0 and BA1 inputs select the bank, and the address provided
on inputs A[0:n] selects the row. This row remains active for accesses until a PRE-
CHARGE command is issued to that bank. A PRECHARGE command must be issued
before opening a different row in the same bank.
Name (Function)
Write enable
Write inhibit
1. Used to mask write data; provided coincident with the corresponding data.
2. All states and sequences not shown are reserved and/or illegal.
36
512Mb: x16, x32 Mobile LPDDR SDRAM
DM
H
L
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
MRD is met.
Valid
DQ
X
© 2004 Micron Technology, Inc. All rights reserved.
Commands
Notes
1, 2
1, 2
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