MT4LC4M16R6TG-5SIT Micron Technology Inc, MT4LC4M16R6TG-5SIT Datasheet - Page 23

• Manufacturer Part Number: MT4LC4M16R6TG-5SIT
• Manufacturer: Micron Technology Inc

Specifications of MT4LC4M16R6TG-5SIT

• Lead Free Status / RoHS Status: Not Compliant

TIMING PARAMETERS
NOTE: 1. Once
4 Meg x 16 EDO DRAM
D29_C.p65 – Rev. 2/01
SYMBOL
t
t
t
t
t
CHD
CLCH
CP
CSR
RASS
CASL#/
CASH#
RAS#
WE#
DQ
2. Once
V
V
V
V
V
V
V
V
OH
OL
IH
IL
IH
IL
IH
IL
MIN
100
15
5
8
5
t
t
RASS (MIN) is met and RAS# remains LOW, the DRAM will enter self refresh mode.
RPS is satisfied, a complete burst of all rows should be executed if RAS#-only or burst CBR refresh is used.
-5
t RP
t RPC
t CP
MAX
t WRP
t CSR
MIN
100
15
10
5
5
t RASS
t CHD
t WRH
(Addresses and OE# = DON’T CARE)
-6
MAX
(
(
(
(
(
)
(
(
)
)
)
)
)
)
(
(
SELF REFRESH CYCLE
)
)
(
(
(
(
(
)
)
)
)
)
OPEN
UNITS
ns
ns
ns
ns
ns
23
SYMBOL
t
t
t
t
t
RP
RPC
RPS
WRH
WRP
NOTE 1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MIN
90
30
5
8
8
t RPC
t RPS
-5
t CP
t WRP
MAX
t WRH
MIN
105
10
10
40
NOTE 2
5
4 MEG x 16
(
EDO DRAM
)
(
)
-6
©2001, Micron Technology, Inc.
OBSOLETE
MAX
DON’T CARE
UNDEFINED
UNITS
ns
ns
ns
ns
ns