IS42S32200B7TL ISSI, Integrated Silicon Solution Inc, IS42S32200B7TL Datasheet - Page 30
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IS42S32200B7TL
Manufacturer Part Number
IS42S32200B7TL
Description
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
SDRAMr
Datasheet
1.IS42S32200B7TL.pdf
(56 pages)
Specifications of IS42S32200B7TL
Organization
2Mx32
Density
64Mb
Address Bus
13b
Access Time (max)
7ns
Maximum Clock Rate
143MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
180mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
IS42S32200B
Fig CAP 3 - WRITE With Auto Precharge interrupted by a READ
Fig CAP 4 - WRITE With Auto Precharge interrupted by a WRITE
30
WRITE with Auto Precharge
3. Interrupted by a READ (with or without auto precharge):
A READ to bank m will interrupt a WRITE on bank n when
registered, with the data-out appearing CAS latency later.
The PRECHARGE to bank n will begin after t
where t
The last valid WRITE to bank n will be data-in registered
one clock prior to the READ to bank m.
Internal States
Internal States
COMMAND
COMMAND
ADDRESS
ADDRESS
WR
BANK m
BANK m
BANK n
BANK n
begins when the READ to bank m is registered.
CLK
CLK
DQ
DQ
T0
Page Active
T0
Page Active
NOP
NOP
WRITE - AP
WRITE - AP
BANK n,
BANK n,
BANK n
BANK n
T1
T1
COL a
COL a
D
D
Page Active
IN
IN
WRITE with Burst of 4
a
a
Page Active
WRITE with Burst of 4
Integrated Silicon Solution, Inc. — www.issi.com —
T2
D
T2
D
NOP
NOP
IN
IN
WR
a+1
a+1
is met,
READ - AP
BANK m,
BANK m
T3
T3
NOP
D
COL b
IN
Interrupt Burst, Write-Back
a+2
t
CAS Latency - 3 (BANK m)
4. Interrupted by a WRITE (with or without auto precharge):
WR
AWRITE to bank m will interrupt a WRITE on bank n when
registered. The PRECHARGE to bank n will begin after
t
m is registered. The last valid data WRITE to bank n will
be data registered one clock prior to a WRITE to bank m.
- BANK n
WR
WRITE - AP
BANK m,
BANK m
T4
T4
NOP
COL b
D
is met, where t
Interrupt Burst, Write-Back
IN
READ with Burst of 4
b
t
WR
WRITE with Burst of 4
- BANK n
T5
T5
D
NOP
NOP
IN
b+1
WR
begins when the WRITE to bank
T6
T6
D
NOP
NOP
IN
D
Precharge
t
OUT
b+2
RP - BANK n
b
t
Precharge
RP - BANK n
DON'T CARE
DON'T CARE
T7
T7
D
NOP
NOP
D
Write-Back
IN
Precharge
OUT
b+3
ISSI
t
t
RP - BANK m
RP - BANK m
1-800-379-4774
b+1
R e v . 0 0 C
09/29/03
®