AT27C256R-15PU Atmel, AT27C256R-15PU Datasheet - Page 2

AT27C256R-15PU

Manufacturer Part Number
AT27C256R-15PU
Description
Manufacturer
Atmel
Datasheet

Specifications of AT27C256R-15PU

Organization
32Kx8
Interface Type
Parallel
In System Programmable
External
Access Time (max)
150ns
Package Type
PDIP
Reprogramming Technique
OTP
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
20mA
Pin Count
28
Mounting
Through Hole
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
The AT27C256R is available in a choice of industry stan-
dard JEDEC-approved one time programmable (OTP)
plastic DIP, PLCC, SOIC, and TSOP packages. All devices
feature two-line control (CE, OE) to give designers the flex-
ibility to prevent bus contention.
With 32K byte storage capability, the AT27C256R allows
firmware to be stored reliably and to be accessed by the
system without the delays of mass storage media.
Atmel’s 27C256R has additional features to ensure high
quality and efficient production use. The Rapid™ Program-
ming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming
time is typically only 100 µs/byte. The Integrated Product
Identification Code electronically identifies the device and
manufacturer. This feature is used by industry standard
programming equipment to select the proper programming
algorithms and voltages.
Block Diagram
2
AT27C256R
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these tran-
sients may exceed data sheet limits, resulting in device
non-conformance. At a minimum, a 0.1 µF high frequency,
low inherent inductance, ceramic capacitor should be uti-
lized for each device. This capacitor should be connected
between the V
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7 µF bulk electrolytic capacitor should
be utilized, again connected between the V
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
CC
and Ground terminals of the device, as
CC
and Ground

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