CY7C4292-10ASC Cypress Semiconductor Corp, CY7C4292-10ASC Datasheet - Page 14
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CY7C4292-10ASC
Manufacturer Part Number
CY7C4292-10ASC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C4292-10ASC.pdf
(16 pages)
Specifications of CY7C4292-10ASC
Configuration
Dual
Density
1.125Mb
Access Time (max)
8ns
Word Size
9b
Organization
128Kx9
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
TQFP
Clock Freq (max)
100MHz
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
40mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Not Compliant
Document #: 38-06009 Rev. *B
Switching Waveforms
Notes:
27. Clocks are free running in this case.
28. The flags may change state during Retransmit as a result of the offset of the read and write pointers, but flags will be valid at t
29. For the synchronous PAE and PAF flags, an appropriate clock cycle is necessary after t
Write Programmable Registers
Read Programmable Registers
Retransmit Timing
REN/WEN
Q
REN
WEN
D
WCLK
0
FL/RT
RCLK
LD
EF/FF
0
–Q
–D
LD
15
8
t
t
CLKH
CLKH
[27, 28, 29]
(continued)
t
t
CLK
CLK
t
t
t
t
ENS
ENS
ENS
ENS
t
DS
PAE OFFSET
LSB
UNKNOWN
t
t
CLKL
CLKL
t
t
ENH
ENH
t
DH
t
A
PAE OFFSET
MSB
PAE OFFSET LSB
RTR
t
PRT
to update these flags.
PAF OFFSET
LSB
PAE OFFSET MSB
t
RTR
PAF OFFSET
RTR
MSB
.
PAF OFFSET
CY7C4282
CY7C4292
PAF OFFSET
LSB
Page 14 of 16
MSB
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