S29JL032H90TAI210 Spansion Inc., S29JL032H90TAI210 Datasheet - Page 37

• Manufacturer Part Number: S29JL032H90TAI210
• Manufacturer: Spansion Inc.

Specifications of S29JL032H90TAI210

• Cell Type: NOR
• Density: 32Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 22/21Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 3/8.5 to 9.5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 4M/2M
• Supply Current: 16mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Not Compliant

Legend
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the WE# or CE# pulse, whichever happens later.
PD = Data to be programmed at location PA. Data latches on the rising edge of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A20–A12 uniquely select any sector.
BA = Address of the bank that is being switched to autoselect mode, is in bypass mode, or is being erased. A20–A18 uniquely select a bank.
Notes
1. See
2. All values are in hexadecimal.
3. Except for the read cycle and the fourth, fifth, and sixth cycle of the autoselect command sequence, all bus cycles are write cycles.
4. Data bits DQ15–DQ8 are don’t care in command sequences, except for RD and PD.
5. Unless otherwise noted, address bits A20–A11 are don’t cares for unlock and command cycles, unless SA or PA is required.
6. No unlock or command cycles required when bank is reading array data.
7. The Reset command is required to return to the read mode (or to the erase-suspend-read mode if previously in Erase Suspend) when a bank is in the autoselect
8. The fourth cycle of the autoselect command sequence is a read cycle. The system must provide the bank address to obtain the manufacturer ID, device ID, or
9. For models 01, 02, the device ID must be read across the fourth, fifth, and sixth cycles.
August 31, 2009 S29JL032H_00_B8
Read
Reset
Enter Secured Silicon Sector
Region
Exit Secured Silicon Sector
Region
Program
Unlock Bypass
Unlock Bypass Program
Unlock Bypass Reset
Chip Erase
Sector Erase
Erase Suspend
Erase Resume
CFI Query
mode, or if DQ5 goes high (while the bank is providing status information).
Secured Silicon Sector factory protect information. Data bits DQ15–DQ8 are don’t care. While reading the autoselect addresses, the bank address must be the
same until a reset command is given. See
Manufacturer ID
Device ID
Secured Silicon Sector
Factory Protect
Sector/Sector Block
Protect Verify
Refer to
(Note 6)
(Note 7)
Table 8.1 on page 13
(Note 16)
Table 8.3 on page 17
Command
Sequence
(Note 9)
(Note 15)
(Note 1)
(Note 14)
(Note 11)
(Note 10)
(Note 13)
(Note 12)
for description of bus operations.
Word
Byte
Word
Byte
Word
Byte
Word
Byte
Word
Byte
Word
Byte
Word
Byte
Word
Byte
Word
Byte
Word
Byte
Word
Byte
and
Table 8.4 on page 19
1
1
4
6
4
4
3
4
4
3
2
2
6
6
1
1
1
Autoselect Command Sequence on page 32
Addr
XXX
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
XXX
XXX
AAA
AAA
555
555
555
555
555
555
555
555
555
555
RA
BA
BA
AA
55
Table 10.1 S29JL032H Command Definitions
First
D a t a
Data
RD
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
F0
A0
90
B0
30
98
for information on sector addresses.
Addr
XXX
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
555
555
555
555
555
555
555
555
555
555
PA
Second
S h e e t
Data
S29JL032H
PD
55
55
55
55
55
55
55
55
00
55
55
(BA)AAA
(BA)AAA
(BA)AAA
(BA)AAA
(BA)555
(BA)555
(BA)555
(BA)555
Addr
AAA
AAA
AAA
AAA
AAA
AAA
555
555
555
555
555
555
Third
for more information.
Bus Cycles (Notes 2–5)
Data
90
90
90
90
88
90
A0
20
80
80
(BA)X00
(BA)X01
(BA)X02
(BA)X03
(BA)X06
(SA)X02
(SA)X04
Addr
XXX
AAA
AAA
555
555
PA
Fourth
Table
82/02
00/01
Data
See
8.5
PD
AA
AA
01
00
(BA)X1C
(BA)X0E
Addr
2AA
2AA
555
555
Fifth
Table
Data
See
8.5
55
55
(BA)X1E
(BA)X0F
Addr
AAA
555
SA
Sixth
Table
Data
See
8.5
10
30
37