SDCFAA-004G SanDisk, SDCFAA-004G Datasheet - Page 21

• Manufacturer Part Number: SDCFAA-004G
• Manufacturer: SanDisk
• Type: CompactFlashr

Specifications of SDCFAA-004G

• Density: 4GByte
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Package Type: Not Required
• Mounting: Socket
• Pin Count: 50
• Operating Temperature Classification: Commercial
• Programmable: Yes
• Lead Free Status / RoHS Status: Supplier Unconfirmed

SanDisk CompactFlash Card OEM Product Manual
02/09, Rev. 1.0 ii © 2007 - 2009 SanDisk Corporation. SanDisk Confidential, subject to all applicable non-disclosure agreements.
DSTROBE
(All Modes – Ultra DMA
Read Protocol Active)
-WE
(PC Card Memory Mode)
-WE
(PC Card I/O Mode)
-WE
(True IDE Mode)
WP
(PC Card Memory Mode)
Write Protect
-IOIS16
(PC Card I/O Mode)
-IOCS16
(True IDE Mode)
Signal Name
I
O
Dir.
36
24
Pin
21
In all modes, when Ultra DMA mode DMA
Read is active, this signal is the data in
strobe generated by the device. Both the
rising and falling edge of DSTROBE
cause data to be latched by the host. The
device may stop generating DSTROBE
edges to pause an Ultra DMA data in
burst.
This is a signal driven by the host and
used for strobing memory write data to the
registers of the CompactFlash Storage
Card or CF+ Card when the card is
configured in the memory interface mode.
It is also used for writing the configuration
registers.
In PC Card I/O Mode, this signal is used
for writing the configuration registers.
In True IDE Mode, this input signal is not
used and should be connected to VCC by
the host.
Memory Mode – The CompactFlash
Storage Card or CF+ Card does not have
a write protect switch. This signal is held
low after the completion of the reset
initialization sequence.
I/O Operation – When the CompactFlash
Storage Card or CF+ Card is configured
for I/O Operation Pin 24 is used for the
-I/O Selected is 16 Bit Port (-IOIS16)
function. A Low signal indicates that a 16
bit or odd byte only operation can be
performed at the addressed port.
In True IDE Mode this output signal is
asserted low when this device is expecting
a word data transfer cycle.
Description
Interface Description