MD2202-D32-X-P SanDisk, MD2202-D32-X-P Datasheet - Page 9

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MD2202-D32-X-P

Manufacturer Part Number
MD2202-D32-X-P
Description
Manufacturer
SanDisk
Datasheet

Specifications of MD2202-D32-X-P

Lead Free Status / RoHS Status
Compliant
3.
3.1
DiskOnChip 2000 consists of the following major functional blocks, as shown in Figure 3:
3.2
The system interface block provides an easy-to-integrate SRAM-like (also EEPROM-like) interface
to DiskOnChip 2000, enabling it to interface with various CPU interfaces, such as a local bus, ISA
bus, SRAM interface, EEPROM interface or any other compatible interface.
A 13-bit wide address bus enables access to the DiskOnChip 8KB memory window (as shown in
Figure 5). The Chip Enable (CE#), Write Enable (WE#) and Output Enable (OE#) signals trigger
read and write cycles. A write cycle occurs while both the CE# and the WE# inputs are asserted.
Similarly, a read cycle occurs while both the CE# and OE# inputs are asserted. Note that
DiskOnChip 2000 does not require a clock signal. The CE#, WE# and OE# signals trigger the
controller (e.g., system interface block, bus control and data pipeline) and flash access.
9
System Interface for host interface.
Boot Block that contains IPL ROM required for recognition during BIOS expansion search in
PC architectures.
Reed-Solomon-based Error Detection and Error Correction Code (EDC/ECC) for on-the-
fly error handling.
Flash Control block that contains registers responsible for transferring the address, data and
control information between the TrueFFS driver and the flash media.
T
Overview
System Interface
HEORY OF
A[0:12]
D[0:7]
CE#
WE#
OE#
O
PERATION
Interface
Figure 3: DiskOnChip 2000 Simplified Block Diagram
System
Boot Block
(IPL ROM)
Data Sheet, Rev. 3.9
EDC/ECC
Flash
Control
Flash
DiskOnChip 2000 DIP
91-SR-002-42-8L

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