MT45W4MW16BCGB-7013 WT TR Micron Technology Inc, MT45W4MW16BCGB-7013 WT TR Datasheet - Page 38
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MT45W4MW16BCGB-7013 WT TR
Manufacturer Part Number
MT45W4MW16BCGB-7013 WT TR
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT45W4MW16BCGB-7013_WT_TR.pdf
(69 pages)
Specifications of MT45W4MW16BCGB-7013 WT TR
Operating Temperature (max)
85C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
Timing Requirements
Table 16:
PDF: 09005aef8247bd51/Source: 09005aef8247bd83
64mb_burst_cr1_5_p25z_133mhz__2.fm - Rev. F 9/07 EN
Parameter
Address access time
ADV# access time
Page access time
Address hold from ADV# HIGH
Address setup to ADV# HIGH
LB#/UB# access time
LB#/UB# disable to DQ High-Z output
LB#/UB# enable to Low-Z output
Maximum CE# pulse width
CE# LOW to WAIT valid
Chip select access time
CE# LOW to ADV# HIGH
Chip disable to DQ and WAIT High-Z output
Chip enable to Low-Z output
Output enable to valid output
Output hold from address change
Output disable to DQ High-Z output
Output enable to Low-Z output
PAGE cycle time
READ cycle time
ADV# pulse width LOW
Asynchronous READ Cycle Timing Requirements
All tests are performed with outputs configured for default setting of one-half drive strength
(BCR[5:4] = 01b).
Notes:
1. Low-Z to High-Z timings are tested with the circuit shown in Figure 27 on page 37. The
2. High-Z to Low-Z timings are tested with the circuit shown in Figure 27 on page 37. The
3. Page mode enabled only.
High-Z timings measure a 100mV transition either from V
Low-Z timings measure a 100mV transition away from the High-Z (V
toward V
64Mb: 4 Meg x 16 Async/Page/Burst CellularRAM 1.5 Memory
OH
or V
OL
.
38
Symbol
t
AADV
t
t
t
t
t
t
t
t
t
t
CEM
CEW
t
t
AVH
t
OHZ
APA
AVS
t
BHZ
t
t
t
CVS
OLZ
t
t
BLZ
t
OH
AA
BA
CO
OE
HZ
RC
VP
PC
LZ
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Min
10
10
20
70
–
–
–
2
5
–
–
–
1
–
7
–
–
5
–
3
5
70ns
OH
Max
7.5
70
70
20
70
70
20
–
–
8
–
4
–
8
–
–
8
–
–
–
–
or V
Timing Requirements
©2005 Micron Technology, Inc. All rights reserved.
OL
toward V
CC
Q/2) level either
Unit
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CC
Q/2.
Notes
1
2
3
1
2
1
2