M69AR048BL70ZB8T STMicroelectronics, M69AR048BL70ZB8T Datasheet - Page 9
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M69AR048BL70ZB8T
Manufacturer Part Number
M69AR048BL70ZB8T
Description
Manufacturer
STMicroelectronics
Datasheet
1.M69AR048BL70ZB8T.pdf
(29 pages)
Specifications of M69AR048BL70ZB8T
Operating Temperature (max)
85C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
uration data is written. The data of the fourth cycle
must be all 0s, and the data of the fifth cycle is the
Power-Down Configuration data (see
5., Power-Down Configuration
cycle is written into a different address, the se-
quence is aborted. In the last cycle, a read is made
from the specific Power-Down Configuration ad-
dress (see
Addresses). The Power-Down Configuration data
Table 2. Operating Modes
Note: X = V
Table 3. Power-Down Modes
Standby (Deselected)
Power-down
No Read
Lower Byte Read
Lower Byte Write
No Write
Upper Byte Read
Upper Byte Write
Word Read
Word Write
Deep Power-Down (default)
4M Partial Power-Down
8M Partial Power-Down
16M Partial Power-Down
1. Should not be kept in this logic condition for a period longer than 1µs.
2. Power-Down mode can be entered from Standby state and all DQ pins are in High-Z state. The Power-Down current and data re-
3. G can be V
Operation
tention depend on the selection of the Power-Down programming.
a. Write pulse is initiated by E1 (E1 Controlled Write timing), or cycle time of the previous operation cycle is satisfied;
b. G stays V
IH
(1)
or V
(1)
(1)
(2)
Table 6., Power-Down Configuration
IL
.
Mode
IL
(1)
(1)
(1)
(1)
IL
during the Write operation if the following conditions are satisfied:
during the entire Write cycle.
V
V
V
V
V
V
V
V
V
E1
X
IH
IL
IL
IL
IL
IL
IL
IL
IL
V
V
V
V
V
V
V
V
V
E2
V
IH
IH
IH
IH
IH
IH
IH
IH
IH
IL
Data). If the fourth
V
V
V
V
V
V
V
V
W
X
X
IH
IH
IH
IH
IL
IL
IL
IL
V
V
V
V
V
V
V
V
IH
G
X
X
IH
IH
IH
IL
IL
IL
IL
(3)
Table
Data Retention
V
V
V
V
LB
V
V
V
V
X
X
IH
IH
IH
IH
IL
IL
IL
IL
16 Mbit
4 Mbit
8 Mbit
No
UB
V
V
V
V
V
V
V
V
X
X
and address must correspond, otherwise the se-
quence is aborted.
When this sequence is performed to take the de-
vice from one Partial Power-Down mode to anoth-
er, the write data may be lost. So, if a Partial
Power-Down mode is used, this sequence should
be performed prior to any normal read or write op-
erations.
IH
IH
IH
IH
IL
IL
IL
IL
Data Output
Data Output
Data Input
Data Input
DQ0-DQ7
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Data Output
Data Output
DQ8-DQ15
Data Input
Data Input
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Retention Address
00000h – 3FFFFh
00000h – 7FFFFh
00000h – FFFFFh
N/A
Power-Down (I
Output Disable
Output Disable
I
Standby (I
CCP4
Active (I
Active (I
Active (I
Active (I
Active (I
Active (I
M69AR048B
I
Power
CCP16
, I
CCP8
CC
CC
CC
CC
CC
CC
)
SB
CCPD
)
)
)
)
)
)
or
)
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