MT45W8MW16BGX-708 WT Micron Technology Inc, MT45W8MW16BGX-708 WT Datasheet - Page 64
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MT45W8MW16BGX-708 WT
Manufacturer Part Number
MT45W8MW16BGX-708 WT
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT45W8MW16BGX-708_WT.pdf
(68 pages)
Specifications of MT45W8MW16BGX-708 WT
Operating Temperature (max)
85C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
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Figure 52:
PDF: 09005aef80ec6f79/Source: 09005aef80ec6f65
128mb_burst_cr1_5_p26z__2.fm - Rev. H 9/07 EN
DQ[15:0]
LB#/UB#
A[22:0]
ADV#
WAIT
WE#
OE#
CLK
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IL
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
OL
IH
IH
IL
OH
OL
OH
Burst READ Followed by Asynchronous WRITE (WE#-Controlled)
Notes:
READ Burst Identified
t
t
(WE# = HIGH)
SP
Address
CSP
t
t
t
SP
SP
t
Valid
SP
CEW
1. Non-default BCR settings for burst READ followed by asynchronous WE#-controlled WRITE:
2. When transitioning between asynchronous and variable-latency burst operations, CE# must
t
HD
t
HD
t
HD
Fixed or variable latency; latency code two (three clocks); WAIT active LOW; WAIT asserted
during delay.
go HIGH. CE# can stay LOW when transitioning from fixed-latency burst READs; asynchro-
nous operation begins at the falling edge of ADV#. A refresh opportunity must be provided
every
clocked CE# HIGH, or b) CE# HIGH for longer than 15ns.
High-Z
t
CEM. A refresh opportunity is satisfied by either of the following two conditions: a)
128Mb: 8 Meg x 16 Async/Page/Burst CellularRAM 1.5 Async/
t
ACLK
t
OLZ
t
BOE
t
KHTL
t
CLK
Output
64
Valid
t
t
t
HD
HD
KOH
t
OHZ
t
HZ
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
Note 2
CBPH
Page/Burst CellularRAM 1.5 Memory
High-Z
t
CEW
t
V
V
AS
IL
IH
t
t
Don’t Care
CW
BW
t
Address
AW
©2004 Micron Technology, Inc. All rights reserved.
t
Valid
WP
t
WC
t
Input
Valid
DW
t
HZ
Undefined
t
WR
t
WPH
t
DH
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