MT45W8MW16BGX-708LWT Micron Technology Inc, MT45W8MW16BGX-708LWT Datasheet - Page 14
MT45W8MW16BGX-708LWT
Manufacturer Part Number
MT45W8MW16BGX-708LWT
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT45W8MW16BGX-708LWT.pdf
(68 pages)
Specifications of MT45W8MW16BGX-708LWT
Operating Temperature (max)
85C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
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Figure 8:
Figure 9:
PDF: 09005aef80ec6f79/Source: 09005aef80ec6f65
128mb_burst_cr1_5_p26z__2.fm - Rev. H 9/07 EN
Burst Mode READ (4-word burst)
Burst Mode WRITE (4-word burst)
Notes:
Notes:
DQ[15:0]
1. Non-default BCR settings for burst mode READ (4-word burst): Fixed or variable latency;
DQ[15:0]
1. Non-default BCR settings for burst mode WRITE (4-word burst): Fixed or variable latency;
LB#/UB#
LB#/UB#
A[22:0]
A[22:0]
ADV#
ADV#
WAIT
WAIT
latency code two (three clocks); WAIT active LOW; WAIT asserted during delay. The diagram
above is representative of variable latency with no refresh collision or fixed-latency access.
latency code two (three clocks); WAIT active LOW; WAIT asserted during delay.
WE#
WE#
OE#
OE#
CLK
CLK
CE#
CE#
128Mb: 8 Meg x 16 Async/Page/Burst CellularRAM 1.5 Async/
WRITE Burst Identified
READ Burst Identified
Address
(WE# = LOW)
Address
(WE# = HIGH)
Valid
Valid
Latency Code 2 (3 clocks)
Latency Code 2 (3 clocks)
14
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Page/Burst CellularRAM 1.5 Memory
D0
D0
D1
D1
Don’t Care
©2004 Micron Technology, Inc. All rights reserved.
D2
D2
Don’t Care
D3
D3
Undefined
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