MT18HTF25672FDY-667E1D4 Micron Technology Inc, MT18HTF25672FDY-667E1D4 Datasheet - Page 8

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MT18HTF25672FDY-667E1D4

Manufacturer Part Number
MT18HTF25672FDY-667E1D4
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT18HTF25672FDY-667E1D4

Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
240FBDIMM
Device Core Size
72b
Organization
256Mx72
Total Density
2GByte
Chip Density
1Gb
Package Type
FBDIMM
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Number Of Elements
18
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 95C
Operating Temperature Classification
Commercial
Pin Count
240
Mounting
Socket
Lead Free Status / RoHS Status
Compliant
Table 7: I
Table 8: I
Table 9: I
Table 10: I
Table 11: I
PDF: 09005aef81a2f237
htf18c128_256x72fdy.pdf - Rev. D 12/09 EN
Symbol
I
I
I
Symbol
I
I
Total power
Symbol
I
I
Total power
Symbol
I
I
Total power
Symbol
I
I
Total power
DD_TRAINING
DD_IBIST
DD_EI
CC
DD
CC
DD
CC
DD
CC
DD
DD
DD
DD
DD
DD
Conditions (Continued)
Specifications – 1GB DDR2-533
Specifications – 1GB DDR2-667
Specifications – 1GB DDR2-800
Specifications – 2GB DDR2-533
I
I
I
I
DD_IDLE_0
DD_IDLE_0
DD_IDLE_0
DD_IDLE_0
2200
1420
2600
1510
2200
1420
TBD
TBD
TBD
Note:
6.2
6.2
7.0
Condition
Training: Primary and secondary channels enabled; 100% toggle on all channel lanes;
DRAMs idle; 0% bandwidth; CKE HIGH; Command and address lines stable; DDR2 SDRAM
clock active
IBIST over all IBIST modes: DRAM idle (0% bandwidth); Primary channel enabled; Secon-
dary channel enabled; CKE HIGH; Command and address lines stable; DDR2 SDRAM clock active
Electrical idle: DRAM idle (0% bandwidth); Primary channel disabled; Secondary channel
disabled; CKE LOW; Command and address lines floated; DDR2 SDRAM clock active; ODT and
CKE driven LOW
1. Actual test conditions may vary from published JEDEC test conditions.
I
I
I
I
DD_IDLE_1
DD_IDLE_1
DD_IDLE_1
DD_IDLE_1
3000
1420
3000
1420
3400
1510
TBD
TBD
TBD
7.4
7.4
8.2
I
I
I
I
DD_ACTIVE_1
DD_ACTIVE_1
DD_ACTIVE_1
DD_ACTIVE_1
1GB, 2GB (x72, DR) 240-Pin DDR2 SDRAM FBDIMM
3400
2545
3400
2425
3900
2777
10.2
10.0
11.4
TBD
TBD
TBD
8
I
I
I
I
DD_ACTIVE_2
DD_ACTIVE_2
DD_ACTIVE_2
DD_ACTIVE_2
3700
1510
3200
1420
3200
1420
TBD
TBD
TBD
8.7
7.7
7.7
Micron Technology, Inc. reserves the right to change products or specifications without notice.
I
DD
I
I
I
I
DD_TRAINING
DD_TRAINING
DD_TRAINING
DD_TRAINING
Conditions and Specifications
4000
1510
3500
1420
3500
1420
TBD
TBD
TBD
9.2
8.2
8.2
I
I
I
I
DD_IBIST
DD_IBIST
© 2005 Micron Technology, Inc. All rights reserved.
DD_IBIST
DD_IBIST
3800
1420
3800
1420
4500
1510
10.0
TBD
TBD
TBD
8.7
8.7
I
I
2000
2000
I
I
DD_EI
DD_EI
2500
326
326
DD_EI
DD_EI
TBD
TBD
TBD
3.8
3.8
326
4.6
Units
Units
Units
Units
W
W
W
W
A
A
A
A
A
A
A
A

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