MT36HTF51272PY-80EG1 Micron Technology Inc, MT36HTF51272PY-80EG1 Datasheet - Page 12
![no-image](/images/manufacturer_photos/0/4/441/micron_technology_inc_sml.jpg)
MT36HTF51272PY-80EG1
Manufacturer Part Number
MT36HTF51272PY-80EG1
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT36HTF51272PY-80EG1.pdf
(18 pages)
Specifications of MT36HTF51272PY-80EG1
Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
240RDIMM
Device Core Size
72b
Organization
512Mx72
Total Density
4GByte
Chip Density
1Gb
Access Time (max)
40ps
Maximum Clock Rate
800MHz
Operating Supply Voltage (typ)
1.8V
Operating Current
3.006A
Number Of Elements
36
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Pin Count
240
Mounting
Socket
Lead Free Status / RoHS Status
Compliant
Table 12:
Table 13:
PDF: 09005aef818e3fc8/Source: 09005aef818e3fdb
HTF36C256_512x72.fm - Rev. C 1/07 EN
Parameter
DC high-level input voltage
DC low-level input voltage
Input voltage (limits)
DC high-level input voltage
DC low-level input voltage
Input differential-pair cross
voltage
Input differential voltage
Input differential voltage
Input current
Output disabled current
Static supply current
Dynamic supply
Input capacitance
Stabilization time
Input clock slew rate
SSC modulation frequency
SSC clock input frequency deviation
PLL loop bandwidth (–3dB from unity gain)
Parameter
PLL Specifications
CU877 device or equivalent JESD82-8.01
PLL Clock Driver Timing Requirements and Switching Characteristics
Notes:
1. PLL timing and switching specifications are critical for proper operation of the DDR2 DIMM.
Symbol
This is a subset of parameters for the specific PLL used. Detailed PLL information is available
in JEDEC standard JESD82.
V
V
I
ID
ID
I
DDLD
V
V
V
I
C
V
ODL
V
V
DD
I
(
(
IH
IN
IH
IN
IX
IL
IL
I
DC
AC
)
)
RESET#, CK, CK#
Each input
CK, CK#
CK, CK#
CK, CK#
CK, CK#
CK, CK#
CK, CK#
RESET#
RESET#
RESET#
2GB, 4GB (x72, ECC, DR) 240-Pin DDR2 SDRAM RDIMM
Pins
N/A
CK, CK# = 270 MHz, all
(not connected to PCB)
12
RESET# = V
V
V
V
Differential input
Differential input
Differential input
Differential input
Differential input
V
CK = CK# = LOW
I
I
I
IH
outputs open
= V
= V
= V
Condition
(
AC
LVCMOS
LVCMOS
DD
DD
DD
) or V
Q or V
Q or V
Q or V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Symbol
SS
t
Q; V
LS
IL
t
L
(
DC
I
SS
SS
SS
Q
Q
I
Q
)
=
Register and PLL Specifications
0.65 × V
0.65 × V
(V
Min
DD
1.0
0.0
2.0
–250
Min
0.15
30
–0.3
100
–10
–
0.3
0.6
2
–
–
Q/2) -
–
–
DD
DD
©2005 Micron Technology, Inc. All rights reserved.
V
V
V
0.35 × V
0.35 × V
(V
DD
DD
DD
–0.50
Max
DD
Max
15
33
0.15
250
500
300
4
Q + 0.3
Q + 0.4
Q + 0.4
–
10
Q/2) +
–
–
–
3
DD
DD
Units
Units
MHz
V/ns
KHz
mV
mV
mV
mV
mV
mA
µs
%
µA
µA
µA
µA
pF
V
V
V