MT18JSF25672PDY-1G1D1 Micron Technology Inc, MT18JSF25672PDY-1G1D1 Datasheet - Page 16

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MT18JSF25672PDY-1G1D1

Manufacturer Part Number
MT18JSF25672PDY-1G1D1
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT18JSF25672PDY-1G1D1

Main Category
DRAM Module
Sub-category
DDR3 SDRAM
Module Type
240RDIMM
Device Core Size
72b
Organization
256Mx72
Total Density
2GByte
Chip Density
1Gb
Maximum Clock Rate
1.066GHz
Operating Supply Voltage (typ)
1.5V
Operating Current
1.53A
Number Of Elements
18
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
240
Mounting
Socket
Lead Free Status / RoHS Status
Compliant
Table 18:
Configuration Register
Table 19:
Table 20:
PDF: 09005aef8304aded/Source: 09005aef8304ae2b
JSF18C256x72PD.fm - Rev. A 4/08 EN
Critical lock
15:5
Bit
Bit
4:3
0
1
2
0
1
2
3
4
RFU
15
bit
7
Description
Basic capability
1: Has alarm and critical trip point capabilities
Accuracy
0: ±2°C over the active range and ±3°C over the monitor range
1: ±1°C over the active range and ±2°C over the monitor range
Wider range
0: Temperatures lower than 0°C are clamped to a binary value of 0
1: Temperatures below 0°C can be read
Temperature resolution
00: 0.5°C LSB
01: 0.25°C LSB
10: 0.125°C LSB
11: 0.0625°C LSB
0: Must be set to zero
Description
Event mode
0: Comparator mode
1: Interrupt mode
EVENT# polarity
0: Active LOW
1: Active HIGH
Critical event only
0: EVENT# trips on alarm or critical temperature event
1: EVENT# trips only if critical temperature is reached
Event output control
0: Event output disabled
1: Event output enabled
Event status
0: EVENT# has not been asserted by this device
1: EVENT# is being asserted due to an alarm window or
critical temperature condition
Capability Register Bit Descriptions
Configuration Register (Address: 0x01)
Configuration Register Bit Descriptions
Alarm lock bit
RFU
14
6
Clear event
RFU
13
5
Temperature Sensor with Serial Presence-Detect EEPROM
Event output
status
RFU
12
4
2GB (x72, ECC, DR) 240-Pin DDR3 SDRAM RDIMM
Bit
Bit
16
Event output
control
Notes
Event mode cannot be changed if either of the lock bits
is set.
EVENT# polarity cannot be changed if either of the lock
bits is set.
This is a read-only field in the register. The event
causing the event can be determined from the read
temperature register.
RFU
11
3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Critical event
only
10
2
Hysteresis
Event polarity
©2008 Micron Technology, Inc. All rights reserved
9
1
Event mode
Shutdown
mode
8
0

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